1/*
2 * phyCORE-MPC5200B-IO (pcm032) board Device Tree Source
3 *
4 * Copyright (C) 2006-2009 Pengutronix
5 * Sascha Hauer <s.hauer@pengutronix.de>
6 * Juergen Beisert <j.beisert@pengutronix.de>
7 * Wolfram Sang <w.sang@pengutronix.de>
8 *
9 * This program is free software; you can redistribute  it and/or modify it
10 * under  the terms of  the GNU General  Public License as published by the
11 * Free Software Foundation;  either version 2 of the  License, or (at your
12 * option) any later version.
13 */
14
15/include/ "mpc5200b.dtsi"
16
17&gpt0 { fsl,has-wdt; };
18&gpt2 { gpio-controller; };
19&gpt3 { gpio-controller; };
20&gpt4 { gpio-controller; };
21&gpt5 { gpio-controller; };
22&gpt6 { gpio-controller; };
23&gpt7 { gpio-controller; };
24
25/ {
26	model = "phytec,pcm032";
27	compatible = "phytec,pcm032";
28
29	memory {
30		reg = <0x00000000 0x08000000>;	// 128MB
31	};
32
33	soc5200@f0000000 {
34		psc@2000 {	/* PSC1 is ac97 */
35			compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
36			cell-index = <0>;
37		};
38
39		/* PSC2 port is used by CAN1/2 */
40		psc@2200 {
41			status = "disabled";
42		};
43
44		psc@2400 { /* PSC3 in UART mode */
45			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
46		};
47
48		/* PSC4 is ??? */
49		psc@2600 {
50			status = "disabled";
51		};
52
53		/* PSC5 is ??? */
54		psc@2800 {
55			status = "disabled";
56		};
57
58		psc@2c00 { /* PSC6 in UART mode */
59			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
60		};
61
62		ethernet@3000 {
63			phy-handle = <&phy0>;
64		};
65
66		mdio@3000 {
67			phy0: ethernet-phy@0 {
68				reg = <0>;
69			};
70		};
71
72		i2c@3d40 {
73			rtc@51 {
74				compatible = "nxp,pcf8563";
75				reg = <0x51>;
76			};
77			eeprom@52 {
78				compatible = "catalyst,24c32";
79				reg = <0x52>;
80				pagesize = <32>;
81			};
82		};
83	};
84
85	pci@f0000d00 {
86		interrupt-map-mask = <0xf800 0 0 7>;
87		interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
88				 0xc000 0 0 2 &mpc5200_pic 1 1 3
89				 0xc000 0 0 3 &mpc5200_pic 1 2 3
90				 0xc000 0 0 4 &mpc5200_pic 1 3 3
91
92				 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
93				 0xc800 0 0 2 &mpc5200_pic 1 2 3
94				 0xc800 0 0 3 &mpc5200_pic 1 3 3
95				 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
96		ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
97			  0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
98			  0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
99	};
100
101	localbus {
102		ranges = <0 0 0xfe000000 0x02000000
103			  1 0 0xfc000000 0x02000000
104			  2 0 0xfbe00000 0x00200000
105			  3 0 0xf9e00000 0x02000000
106			  4 0 0xf7e00000 0x02000000
107			  5 0 0xe6000000 0x02000000
108			  6 0 0xe8000000 0x02000000
109			  7 0 0xea000000 0x02000000>;
110
111		flash@0,0 {
112			compatible = "cfi-flash";
113			reg = <0 0 0x02000000>;
114			bank-width = <4>;
115			#size-cells = <1>;
116			#address-cells = <1>;
117
118			partition@0 {
119				label = "ubootl";
120				reg = <0x00000000 0x00040000>;
121			};
122			partition@40000 {
123				label = "kernel";
124				reg = <0x00040000 0x001c0000>;
125			};
126			partition@200000 {
127				label = "jffs2";
128				reg = <0x00200000 0x01d00000>;
129			};
130			partition@1f00000 {
131				label = "uboot";
132				reg = <0x01f00000 0x00040000>;
133			};
134			partition@1f40000 {
135				label = "env";
136				reg = <0x01f40000 0x00040000>;
137			};
138			partition@1f80000 {
139				label = "oftree";
140				reg = <0x01f80000 0x00040000>;
141			};
142			partition@1fc0000 {
143				label = "space";
144				reg = <0x01fc0000 0x00040000>;
145			};
146		};
147
148		sram@2,0 {
149			compatible = "mtd-ram";
150			reg = <2 0 0x00200000>;
151			bank-width = <2>;
152		};
153
154		/*
155		 * example snippets for FPGA
156		 *
157		 * fpga@3,0 {
158		 *	 compatible = "fpga_driver";
159		 *	 reg = <3 0 0x02000000>;
160		 *	 bank-width = <4>;
161		 * };
162		 *
163		 * fpga@4,0 {
164		 *	 compatible = "fpga_driver";
165		 *	 reg = <4 0 0x02000000>;
166		 *	 bank-width = <4>;
167		 * };
168		 */
169
170		/*
171		 * example snippets for free chipselects
172		 *
173		 * device@5,0 {
174		 *	 compatible = "custom_driver";
175		 *	 reg = <5 0 0x02000000>;
176		 * };
177		 *
178		 * device@6,0 {
179		 *	 compatible = "custom_driver";
180		 *	 reg = <6 0 0x02000000>;
181		 * };
182		 *
183		 * device@7,0 {
184		 *	 compatible = "custom_driver";
185		 *	 reg = <7 0 0x02000000>;
186		 * };
187		 */
188	};
189};
190