1/* IEEE754 floating point arithmetic
2 * single precision
3 */
4/*
5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 *
8 *  This program is free software; you can distribute it and/or modify it
9 *  under the terms of the GNU General Public License (Version 2) as
10 *  published by the Free Software Foundation.
11 *
12 *  This program is distributed in the hope it will be useful, but WITHOUT
13 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
15 *  for more details.
16 *
17 *  You should have received a copy of the GNU General Public License along
18 *  with this program; if not, write to the Free Software Foundation, Inc.,
19 *  51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA.
20 */
21
22#include "ieee754sp.h"
23
24union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
25{
26	int s;
27
28	COMPXSP;
29	COMPYSP;
30
31	EXPLODEXSP;
32	EXPLODEYSP;
33
34	ieee754_clearcx();
35
36	FLUSHXSP;
37	FLUSHYSP;
38
39	switch (CLPAIR(xc, yc)) {
40	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
41	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
42	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
43	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
44	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
45		return ieee754sp_nanxcpt(y);
46
47	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
48	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
49	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
50	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
51	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
52	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
53		return ieee754sp_nanxcpt(x);
54
55	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
56	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
57	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
58	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
59		return y;
60
61	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
62	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
63	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
64	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
65	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
66		return x;
67
68
69	/*
70	 * Infinity handling
71	 */
72	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
73		if (xs == ys)
74			return x;
75		ieee754_setcx(IEEE754_INVALID_OPERATION);
76		return ieee754sp_indef();
77
78	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
79	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
80	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
81		return y;
82
83	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
84	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
85	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
86		return x;
87
88	/*
89	 * Zero handling
90	 */
91	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
92		if (xs == ys)
93			return x;
94		else
95			return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD);
96
97	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
98	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
99		return x;
100
101	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
102	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
103		return y;
104
105	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
106		SPDNORMX;
107
108		/* FALL THROUGH */
109
110	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
111		SPDNORMY;
112		break;
113
114	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
115		SPDNORMX;
116		break;
117
118	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
119		break;
120	}
121	assert(xm & SP_HIDDEN_BIT);
122	assert(ym & SP_HIDDEN_BIT);
123
124	/*
125	 * Provide guard, round and stick bit space.
126	 */
127	xm <<= 3;
128	ym <<= 3;
129
130	if (xe > ye) {
131		/*
132		 * Have to shift y fraction right to align.
133		 */
134		s = xe - ye;
135		SPXSRSYn(s);
136	} else if (ye > xe) {
137		/*
138		 * Have to shift x fraction right to align.
139		 */
140		s = ye - xe;
141		SPXSRSXn(s);
142	}
143	assert(xe == ye);
144	assert(xe <= SP_EMAX);
145
146	if (xs == ys) {
147		/*
148		 * Generate 28 bit result of adding two 27 bit numbers
149		 * leaving result in xm, xs and xe.
150		 */
151		xm = xm + ym;
152
153		if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */
154			SPXSRSX1();
155		}
156	} else {
157		if (xm >= ym) {
158			xm = xm - ym;
159		} else {
160			xm = ym - xm;
161			xs = ys;
162		}
163		if (xm == 0)
164			return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD);
165
166		/*
167		 * Normalize in extended single precision
168		 */
169		while ((xm >> (SP_FBITS + 3)) == 0) {
170			xm <<= 1;
171			xe--;
172		}
173	}
174
175	return ieee754sp_format(xs, xe, xm);
176}
177