1/*
2 * Implement the default iomap interfaces
3 *
4 * (C) Copyright 2004 Linus Torvalds
5 * (C) Copyright 2006 Ralf Baechle <ralf@linux-mips.org>
6 * (C) Copyright 2007 MIPS Technologies, Inc.
7 *     written by Ralf Baechle <ralf@linux-mips.org>
8 */
9#include <linux/module.h>
10#include <asm/io.h>
11
12/*
13 * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
14 * access or a MMIO access, these functions don't care. The info is
15 * encoded in the hardware mapping set up by the mapping functions
16 * (or the cookie itself, depending on implementation and hw).
17 *
18 * The generic routines don't assume any hardware mappings, and just
19 * encode the PIO/MMIO as part of the cookie. They coldly assume that
20 * the MMIO IO mappings are not in the low address range.
21 *
22 * Architectures for which this is not true can't use this generic
23 * implementation and should do their own copy.
24 */
25
26#define PIO_MASK	0x0ffffUL
27
28unsigned int ioread8(void __iomem *addr)
29{
30	return readb(addr);
31}
32
33EXPORT_SYMBOL(ioread8);
34
35unsigned int ioread16(void __iomem *addr)
36{
37	return readw(addr);
38}
39
40EXPORT_SYMBOL(ioread16);
41
42unsigned int ioread16be(void __iomem *addr)
43{
44	return be16_to_cpu(__raw_readw(addr));
45}
46
47EXPORT_SYMBOL(ioread16be);
48
49unsigned int ioread32(void __iomem *addr)
50{
51	return readl(addr);
52}
53
54EXPORT_SYMBOL(ioread32);
55
56unsigned int ioread32be(void __iomem *addr)
57{
58	return be32_to_cpu(__raw_readl(addr));
59}
60
61EXPORT_SYMBOL(ioread32be);
62
63void iowrite8(u8 val, void __iomem *addr)
64{
65	writeb(val, addr);
66}
67
68EXPORT_SYMBOL(iowrite8);
69
70void iowrite16(u16 val, void __iomem *addr)
71{
72	writew(val, addr);
73}
74
75EXPORT_SYMBOL(iowrite16);
76
77void iowrite16be(u16 val, void __iomem *addr)
78{
79	__raw_writew(cpu_to_be16(val), addr);
80}
81
82EXPORT_SYMBOL(iowrite16be);
83
84void iowrite32(u32 val, void __iomem *addr)
85{
86	writel(val, addr);
87}
88
89EXPORT_SYMBOL(iowrite32);
90
91void iowrite32be(u32 val, void __iomem *addr)
92{
93	__raw_writel(cpu_to_be32(val), addr);
94}
95
96EXPORT_SYMBOL(iowrite32be);
97
98/*
99 * These are the "repeat MMIO read/write" functions.
100 * Note the "__mem" accesses, since we want to convert
101 * to CPU byte order if the host bus happens to not match the
102 * endianness of PCI/ISA (see mach-generic/mangle-port.h).
103 */
104static inline void mmio_insb(void __iomem *addr, u8 *dst, int count)
105{
106	while (--count >= 0) {
107		u8 data = __mem_readb(addr);
108		*dst = data;
109		dst++;
110	}
111}
112
113static inline void mmio_insw(void __iomem *addr, u16 *dst, int count)
114{
115	while (--count >= 0) {
116		u16 data = __mem_readw(addr);
117		*dst = data;
118		dst++;
119	}
120}
121
122static inline void mmio_insl(void __iomem *addr, u32 *dst, int count)
123{
124	while (--count >= 0) {
125		u32 data = __mem_readl(addr);
126		*dst = data;
127		dst++;
128	}
129}
130
131static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count)
132{
133	while (--count >= 0) {
134		__mem_writeb(*src, addr);
135		src++;
136	}
137}
138
139static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count)
140{
141	while (--count >= 0) {
142		__mem_writew(*src, addr);
143		src++;
144	}
145}
146
147static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count)
148{
149	while (--count >= 0) {
150		__mem_writel(*src, addr);
151		src++;
152	}
153}
154
155void ioread8_rep(void __iomem *addr, void *dst, unsigned long count)
156{
157	mmio_insb(addr, dst, count);
158}
159
160EXPORT_SYMBOL(ioread8_rep);
161
162void ioread16_rep(void __iomem *addr, void *dst, unsigned long count)
163{
164	mmio_insw(addr, dst, count);
165}
166
167EXPORT_SYMBOL(ioread16_rep);
168
169void ioread32_rep(void __iomem *addr, void *dst, unsigned long count)
170{
171	mmio_insl(addr, dst, count);
172}
173
174EXPORT_SYMBOL(ioread32_rep);
175
176void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
177{
178	mmio_outsb(addr, src, count);
179}
180
181EXPORT_SYMBOL(iowrite8_rep);
182
183void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
184{
185	mmio_outsw(addr, src, count);
186}
187
188EXPORT_SYMBOL(iowrite16_rep);
189
190void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
191{
192	mmio_outsl(addr, src, count);
193}
194
195EXPORT_SYMBOL(iowrite32_rep);
196
197/*
198 * Create a virtual mapping cookie for an IO port range
199 *
200 * This uses the same mapping are as the in/out family which has to be setup
201 * by the platform initialization code.
202 *
203 * Just to make matters somewhat more interesting on MIPS systems with
204 * multiple host bridge each will have it's own ioport address space.
205 */
206static void __iomem *ioport_map_legacy(unsigned long port, unsigned int nr)
207{
208	return (void __iomem *) (mips_io_port_base + port);
209}
210
211void __iomem *ioport_map(unsigned long port, unsigned int nr)
212{
213	if (port > PIO_MASK)
214		return NULL;
215
216	return ioport_map_legacy(port, nr);
217}
218
219EXPORT_SYMBOL(ioport_map);
220
221void ioport_unmap(void __iomem *addr)
222{
223	/* Nothing to do */
224}
225
226EXPORT_SYMBOL(ioport_unmap);
227