1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License.  See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006  Ralf Baechle <ralf@linux-mips.org>
7 * Copyright (C) 2007  Felix Fietkau <nbd@openwrt.org>
8 *
9 */
10#ifndef __ASM_MACH_ATH25_DMA_COHERENCE_H
11#define __ASM_MACH_ATH25_DMA_COHERENCE_H
12
13#include <linux/device.h>
14
15/*
16 * We need some arbitrary non-zero value to be programmed to the BAR1 register
17 * of PCI host controller to enable DMA. The same value should be used as the
18 * offset to calculate the physical address of DMA buffer for PCI devices.
19 */
20#define AR2315_PCI_HOST_SDRAM_BASEADDR	0x20000000
21
22static inline dma_addr_t ath25_dev_offset(struct device *dev)
23{
24#ifdef CONFIG_PCI
25	extern struct bus_type pci_bus_type;
26
27	if (dev && dev->bus == &pci_bus_type)
28		return AR2315_PCI_HOST_SDRAM_BASEADDR;
29#endif
30	return 0;
31}
32
33static inline dma_addr_t
34plat_map_dma_mem(struct device *dev, void *addr, size_t size)
35{
36	return virt_to_phys(addr) + ath25_dev_offset(dev);
37}
38
39static inline dma_addr_t
40plat_map_dma_mem_page(struct device *dev, struct page *page)
41{
42	return page_to_phys(page) + ath25_dev_offset(dev);
43}
44
45static inline unsigned long
46plat_dma_addr_to_phys(struct device *dev, dma_addr_t dma_addr)
47{
48	return dma_addr - ath25_dev_offset(dev);
49}
50
51static inline void
52plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr, size_t size,
53		   enum dma_data_direction direction)
54{
55}
56
57static inline int plat_dma_supported(struct device *dev, u64 mask)
58{
59	return 1;
60}
61
62static inline int plat_device_is_coherent(struct device *dev)
63{
64#ifdef CONFIG_DMA_COHERENT
65	return 1;
66#endif
67#ifdef CONFIG_DMA_NONCOHERENT
68	return 0;
69#endif
70}
71
72static inline void plat_post_dma_flush(struct device *dev)
73{
74}
75
76#endif /* __ASM_MACH_ATH25_DMA_COHERENCE_H */
77