1/* 2 * Atheros AR71XX/AR724X/AR913X common devices 3 * 4 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> 5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> 6 * 7 * Parts of this file are based on Atheros' 2.6.15 BSP 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License version 2 as published 11 * by the Free Software Foundation. 12 */ 13 14#include <linux/kernel.h> 15#include <linux/init.h> 16#include <linux/platform_device.h> 17#include <linux/serial_8250.h> 18#include <linux/clk.h> 19#include <linux/err.h> 20 21#include <asm/mach-ath79/ath79.h> 22#include <asm/mach-ath79/ar71xx_regs.h> 23#include "common.h" 24#include "dev-common.h" 25 26static struct resource ath79_uart_resources[] = { 27 { 28 .start = AR71XX_UART_BASE, 29 .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1, 30 .flags = IORESOURCE_MEM, 31 }, 32}; 33 34#define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP) 35static struct plat_serial8250_port ath79_uart_data[] = { 36 { 37 .mapbase = AR71XX_UART_BASE, 38 .irq = ATH79_MISC_IRQ(3), 39 .flags = AR71XX_UART_FLAGS, 40 .iotype = UPIO_MEM32, 41 .regshift = 2, 42 }, { 43 /* terminating entry */ 44 } 45}; 46 47static struct platform_device ath79_uart_device = { 48 .name = "serial8250", 49 .id = PLAT8250_DEV_PLATFORM, 50 .resource = ath79_uart_resources, 51 .num_resources = ARRAY_SIZE(ath79_uart_resources), 52 .dev = { 53 .platform_data = ath79_uart_data 54 }, 55}; 56 57static struct resource ar933x_uart_resources[] = { 58 { 59 .start = AR933X_UART_BASE, 60 .end = AR933X_UART_BASE + AR71XX_UART_SIZE - 1, 61 .flags = IORESOURCE_MEM, 62 }, 63 { 64 .start = ATH79_MISC_IRQ(3), 65 .end = ATH79_MISC_IRQ(3), 66 .flags = IORESOURCE_IRQ, 67 }, 68}; 69 70static struct platform_device ar933x_uart_device = { 71 .name = "ar933x-uart", 72 .id = -1, 73 .resource = ar933x_uart_resources, 74 .num_resources = ARRAY_SIZE(ar933x_uart_resources), 75}; 76 77void __init ath79_register_uart(void) 78{ 79 unsigned long uart_clk_rate; 80 81 uart_clk_rate = ath79_get_sys_clk_rate("uart"); 82 83 if (soc_is_ar71xx() || 84 soc_is_ar724x() || 85 soc_is_ar913x() || 86 soc_is_ar934x() || 87 soc_is_qca955x()) { 88 ath79_uart_data[0].uartclk = uart_clk_rate; 89 platform_device_register(&ath79_uart_device); 90 } else if (soc_is_ar933x()) { 91 platform_device_register(&ar933x_uart_device); 92 } else { 93 BUG(); 94 } 95} 96 97void __init ath79_register_wdt(void) 98{ 99 struct resource res; 100 101 memset(&res, 0, sizeof(res)); 102 103 res.flags = IORESOURCE_MEM; 104 res.start = AR71XX_RESET_BASE + AR71XX_RESET_REG_WDOG_CTRL; 105 res.end = res.start + 0x8 - 1; 106 107 platform_device_register_simple("ath79-wdt", -1, &res, 1); 108} 109