1 /*
2 * SMP boot-related support
3 *
4 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
6 * Copyright (C) 2001, 2004-2005 Intel Corp
7 * Rohit Seth <rohit.seth@intel.com>
8 * Suresh Siddha <suresh.b.siddha@intel.com>
9 * Gordon Jin <gordon.jin@intel.com>
10 * Ashok Raj <ashok.raj@intel.com>
11 *
12 * 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here.
13 * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code.
14 * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence.
15 * smp_boot_cpus()/smp_commence() is replaced by
16 * smp_prepare_cpus()/__cpu_up()/smp_cpus_done().
17 * 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
18 * 04/12/26 Jin Gordon <gordon.jin@intel.com>
19 * 04/12/26 Rohit Seth <rohit.seth@intel.com>
20 * Add multi-threading and multi-core detection
21 * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com>
22 * Setup cpu_sibling_map and cpu_core_map
23 */
24
25 #include <linux/module.h>
26 #include <linux/acpi.h>
27 #include <linux/bootmem.h>
28 #include <linux/cpu.h>
29 #include <linux/delay.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/irq.h>
33 #include <linux/kernel.h>
34 #include <linux/kernel_stat.h>
35 #include <linux/mm.h>
36 #include <linux/notifier.h>
37 #include <linux/smp.h>
38 #include <linux/spinlock.h>
39 #include <linux/efi.h>
40 #include <linux/percpu.h>
41 #include <linux/bitops.h>
42
43 #include <linux/atomic.h>
44 #include <asm/cache.h>
45 #include <asm/current.h>
46 #include <asm/delay.h>
47 #include <asm/io.h>
48 #include <asm/irq.h>
49 #include <asm/machvec.h>
50 #include <asm/mca.h>
51 #include <asm/page.h>
52 #include <asm/paravirt.h>
53 #include <asm/pgalloc.h>
54 #include <asm/pgtable.h>
55 #include <asm/processor.h>
56 #include <asm/ptrace.h>
57 #include <asm/sal.h>
58 #include <asm/tlbflush.h>
59 #include <asm/unistd.h>
60 #include <asm/sn/arch.h>
61
62 #define SMP_DEBUG 0
63
64 #if SMP_DEBUG
65 #define Dprintk(x...) printk(x)
66 #else
67 #define Dprintk(x...)
68 #endif
69
70 #ifdef CONFIG_HOTPLUG_CPU
71 #ifdef CONFIG_PERMIT_BSP_REMOVE
72 #define bsp_remove_ok 1
73 #else
74 #define bsp_remove_ok 0
75 #endif
76
77 /*
78 * Global array allocated for NR_CPUS at boot time
79 */
80 struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
81
82 /*
83 * start_ap in head.S uses this to store current booting cpu
84 * info.
85 */
86 struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0];
87
88 #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]);
89
90 #else
91 #define set_brendez_area(x)
92 #endif
93
94
95 /*
96 * ITC synchronization related stuff:
97 */
98 #define MASTER (0)
99 #define SLAVE (SMP_CACHE_BYTES/8)
100
101 #define NUM_ROUNDS 64 /* magic value */
102 #define NUM_ITERS 5 /* likewise */
103
104 static DEFINE_SPINLOCK(itc_sync_lock);
105 static volatile unsigned long go[SLAVE + 1];
106
107 #define DEBUG_ITC_SYNC 0
108
109 extern void start_ap (void);
110 extern unsigned long ia64_iobase;
111
112 struct task_struct *task_for_booting_cpu;
113
114 /*
115 * State for each CPU
116 */
117 DEFINE_PER_CPU(int, cpu_state);
118
119 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
120 EXPORT_SYMBOL(cpu_core_map);
121 DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map);
122 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
123
124 int smp_num_siblings = 1;
125
126 /* which logical CPU number maps to which CPU (physical APIC ID) */
127 volatile int ia64_cpu_to_sapicid[NR_CPUS];
128 EXPORT_SYMBOL(ia64_cpu_to_sapicid);
129
130 static cpumask_t cpu_callin_map;
131
132 struct smp_boot_data smp_boot_data __initdata;
133
134 unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */
135
136 char __initdata no_int_routing;
137
138 unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */
139
140 #ifdef CONFIG_FORCE_CPEI_RETARGET
141 #define CPEI_OVERRIDE_DEFAULT (1)
142 #else
143 #define CPEI_OVERRIDE_DEFAULT (0)
144 #endif
145
146 unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT;
147
148 static int __init
cmdl_force_cpei(char * str)149 cmdl_force_cpei(char *str)
150 {
151 int value=0;
152
153 get_option (&str, &value);
154 force_cpei_retarget = value;
155
156 return 1;
157 }
158
159 __setup("force_cpei=", cmdl_force_cpei);
160
161 static int __init
nointroute(char * str)162 nointroute (char *str)
163 {
164 no_int_routing = 1;
165 printk ("no_int_routing on\n");
166 return 1;
167 }
168
169 __setup("nointroute", nointroute);
170
fix_b0_for_bsp(void)171 static void fix_b0_for_bsp(void)
172 {
173 #ifdef CONFIG_HOTPLUG_CPU
174 int cpuid;
175 static int fix_bsp_b0 = 1;
176
177 cpuid = smp_processor_id();
178
179 /*
180 * Cache the b0 value on the first AP that comes up
181 */
182 if (!(fix_bsp_b0 && cpuid))
183 return;
184
185 sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0];
186 printk ("Fixed BSP b0 value from CPU %d\n", cpuid);
187
188 fix_bsp_b0 = 0;
189 #endif
190 }
191
192 void
sync_master(void * arg)193 sync_master (void *arg)
194 {
195 unsigned long flags, i;
196
197 go[MASTER] = 0;
198
199 local_irq_save(flags);
200 {
201 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) {
202 while (!go[MASTER])
203 cpu_relax();
204 go[MASTER] = 0;
205 go[SLAVE] = ia64_get_itc();
206 }
207 }
208 local_irq_restore(flags);
209 }
210
211 /*
212 * Return the number of cycles by which our itc differs from the itc on the master
213 * (time-keeper) CPU. A positive number indicates our itc is ahead of the master,
214 * negative that it is behind.
215 */
216 static inline long
get_delta(long * rt,long * master)217 get_delta (long *rt, long *master)
218 {
219 unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0;
220 unsigned long tcenter, t0, t1, tm;
221 long i;
222
223 for (i = 0; i < NUM_ITERS; ++i) {
224 t0 = ia64_get_itc();
225 go[MASTER] = 1;
226 while (!(tm = go[SLAVE]))
227 cpu_relax();
228 go[SLAVE] = 0;
229 t1 = ia64_get_itc();
230
231 if (t1 - t0 < best_t1 - best_t0)
232 best_t0 = t0, best_t1 = t1, best_tm = tm;
233 }
234
235 *rt = best_t1 - best_t0;
236 *master = best_tm - best_t0;
237
238 /* average best_t0 and best_t1 without overflow: */
239 tcenter = (best_t0/2 + best_t1/2);
240 if (best_t0 % 2 + best_t1 % 2 == 2)
241 ++tcenter;
242 return tcenter - best_tm;
243 }
244
245 /*
246 * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
247 * (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of
248 * unaccounted-for errors (such as getting a machine check in the middle of a calibration
249 * step). The basic idea is for the slave to ask the master what itc value it has and to
250 * read its own itc before and after the master responds. Each iteration gives us three
251 * timestamps:
252 *
253 * slave master
254 *
255 * t0 ---\
256 * ---\
257 * --->
258 * tm
259 * /---
260 * /---
261 * t1 <---
262 *
263 *
264 * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
265 * and t1. If we achieve this, the clocks are synchronized provided the interconnect
266 * between the slave and the master is symmetric. Even if the interconnect were
267 * asymmetric, we would still know that the synchronization error is smaller than the
268 * roundtrip latency (t0 - t1).
269 *
270 * When the interconnect is quiet and symmetric, this lets us synchronize the itc to
271 * within one or two cycles. However, we can only *guarantee* that the synchronization is
272 * accurate to within a round-trip time, which is typically in the range of several
273 * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually
274 * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better
275 * than half a micro second or so.
276 */
277 void
ia64_sync_itc(unsigned int master)278 ia64_sync_itc (unsigned int master)
279 {
280 long i, delta, adj, adjust_latency = 0, done = 0;
281 unsigned long flags, rt, master_time_stamp, bound;
282 #if DEBUG_ITC_SYNC
283 struct {
284 long rt; /* roundtrip time */
285 long master; /* master's timestamp */
286 long diff; /* difference between midpoint and master's timestamp */
287 long lat; /* estimate of itc adjustment latency */
288 } t[NUM_ROUNDS];
289 #endif
290
291 /*
292 * Make sure local timer ticks are disabled while we sync. If
293 * they were enabled, we'd have to worry about nasty issues
294 * like setting the ITC ahead of (or a long time before) the
295 * next scheduled tick.
296 */
297 BUG_ON((ia64_get_itv() & (1 << 16)) == 0);
298
299 go[MASTER] = 1;
300
301 if (smp_call_function_single(master, sync_master, NULL, 0) < 0) {
302 printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master);
303 return;
304 }
305
306 while (go[MASTER])
307 cpu_relax(); /* wait for master to be ready */
308
309 spin_lock_irqsave(&itc_sync_lock, flags);
310 {
311 for (i = 0; i < NUM_ROUNDS; ++i) {
312 delta = get_delta(&rt, &master_time_stamp);
313 if (delta == 0) {
314 done = 1; /* let's lock on to this... */
315 bound = rt;
316 }
317
318 if (!done) {
319 if (i > 0) {
320 adjust_latency += -delta;
321 adj = -delta + adjust_latency/4;
322 } else
323 adj = -delta;
324
325 ia64_set_itc(ia64_get_itc() + adj);
326 }
327 #if DEBUG_ITC_SYNC
328 t[i].rt = rt;
329 t[i].master = master_time_stamp;
330 t[i].diff = delta;
331 t[i].lat = adjust_latency/4;
332 #endif
333 }
334 }
335 spin_unlock_irqrestore(&itc_sync_lock, flags);
336
337 #if DEBUG_ITC_SYNC
338 for (i = 0; i < NUM_ROUNDS; ++i)
339 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n",
340 t[i].rt, t[i].master, t[i].diff, t[i].lat);
341 #endif
342
343 printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, "
344 "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt);
345 }
346
347 /*
348 * Ideally sets up per-cpu profiling hooks. Doesn't do much now...
349 */
smp_setup_percpu_timer(void)350 static inline void smp_setup_percpu_timer(void)
351 {
352 }
353
354 static void
smp_callin(void)355 smp_callin (void)
356 {
357 int cpuid, phys_id, itc_master;
358 struct cpuinfo_ia64 *last_cpuinfo, *this_cpuinfo;
359 extern void ia64_init_itm(void);
360 extern volatile int time_keeper_id;
361
362 #ifdef CONFIG_PERFMON
363 extern void pfm_init_percpu(void);
364 #endif
365
366 cpuid = smp_processor_id();
367 phys_id = hard_smp_processor_id();
368 itc_master = time_keeper_id;
369
370 if (cpu_online(cpuid)) {
371 printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n",
372 phys_id, cpuid);
373 BUG();
374 }
375
376 fix_b0_for_bsp();
377
378 /*
379 * numa_node_id() works after this.
380 */
381 set_numa_node(cpu_to_node_map[cpuid]);
382 set_numa_mem(local_memory_node(cpu_to_node_map[cpuid]));
383
384 spin_lock(&vector_lock);
385 /* Setup the per cpu irq handling data structures */
386 __setup_vector_irq(cpuid);
387 notify_cpu_starting(cpuid);
388 set_cpu_online(cpuid, true);
389 per_cpu(cpu_state, cpuid) = CPU_ONLINE;
390 spin_unlock(&vector_lock);
391
392 smp_setup_percpu_timer();
393
394 ia64_mca_cmc_vector_setup(); /* Setup vector on AP */
395
396 #ifdef CONFIG_PERFMON
397 pfm_init_percpu();
398 #endif
399
400 local_irq_enable();
401
402 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
403 /*
404 * Synchronize the ITC with the BP. Need to do this after irqs are
405 * enabled because ia64_sync_itc() calls smp_call_function_single(), which
406 * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls
407 * local_bh_enable(), which bugs out if irqs are not enabled...
408 */
409 Dprintk("Going to syncup ITC with ITC Master.\n");
410 ia64_sync_itc(itc_master);
411 }
412
413 /*
414 * Get our bogomips.
415 */
416 ia64_init_itm();
417
418 /*
419 * Delay calibration can be skipped if new processor is identical to the
420 * previous processor.
421 */
422 last_cpuinfo = cpu_data(cpuid - 1);
423 this_cpuinfo = local_cpu_data;
424 if (last_cpuinfo->itc_freq != this_cpuinfo->itc_freq ||
425 last_cpuinfo->proc_freq != this_cpuinfo->proc_freq ||
426 last_cpuinfo->features != this_cpuinfo->features ||
427 last_cpuinfo->revision != this_cpuinfo->revision ||
428 last_cpuinfo->family != this_cpuinfo->family ||
429 last_cpuinfo->archrev != this_cpuinfo->archrev ||
430 last_cpuinfo->model != this_cpuinfo->model)
431 calibrate_delay();
432 local_cpu_data->loops_per_jiffy = loops_per_jiffy;
433
434 /*
435 * Allow the master to continue.
436 */
437 cpumask_set_cpu(cpuid, &cpu_callin_map);
438 Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid);
439 }
440
441
442 /*
443 * Activate a secondary processor. head.S calls this.
444 */
445 int
start_secondary(void * unused)446 start_secondary (void *unused)
447 {
448 /* Early console may use I/O ports */
449 ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
450 #ifndef CONFIG_PRINTK_TIME
451 Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id());
452 #endif
453 efi_map_pal_code();
454 cpu_init();
455 preempt_disable();
456 smp_callin();
457
458 cpu_startup_entry(CPUHP_ONLINE);
459 return 0;
460 }
461
462 static int
do_boot_cpu(int sapicid,int cpu,struct task_struct * idle)463 do_boot_cpu (int sapicid, int cpu, struct task_struct *idle)
464 {
465 int timeout;
466
467 task_for_booting_cpu = idle;
468 Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid);
469
470 set_brendez_area(cpu);
471 platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0);
472
473 /*
474 * Wait 10s total for the AP to start
475 */
476 Dprintk("Waiting on callin_map ...");
477 for (timeout = 0; timeout < 100000; timeout++) {
478 if (cpumask_test_cpu(cpu, &cpu_callin_map))
479 break; /* It has booted */
480 barrier(); /* Make sure we re-read cpu_callin_map */
481 udelay(100);
482 }
483 Dprintk("\n");
484
485 if (!cpumask_test_cpu(cpu, &cpu_callin_map)) {
486 printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid);
487 ia64_cpu_to_sapicid[cpu] = -1;
488 set_cpu_online(cpu, false); /* was set in smp_callin() */
489 return -EINVAL;
490 }
491 return 0;
492 }
493
494 static int __init
decay(char * str)495 decay (char *str)
496 {
497 int ticks;
498 get_option (&str, &ticks);
499 return 1;
500 }
501
502 __setup("decay=", decay);
503
504 /*
505 * Initialize the logical CPU number to SAPICID mapping
506 */
507 void __init
smp_build_cpu_map(void)508 smp_build_cpu_map (void)
509 {
510 int sapicid, cpu, i;
511 int boot_cpu_id = hard_smp_processor_id();
512
513 for (cpu = 0; cpu < NR_CPUS; cpu++) {
514 ia64_cpu_to_sapicid[cpu] = -1;
515 }
516
517 ia64_cpu_to_sapicid[0] = boot_cpu_id;
518 init_cpu_present(cpumask_of(0));
519 set_cpu_possible(0, true);
520 for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) {
521 sapicid = smp_boot_data.cpu_phys_id[i];
522 if (sapicid == boot_cpu_id)
523 continue;
524 set_cpu_present(cpu, true);
525 set_cpu_possible(cpu, true);
526 ia64_cpu_to_sapicid[cpu] = sapicid;
527 cpu++;
528 }
529 }
530
531 /*
532 * Cycle through the APs sending Wakeup IPIs to boot each.
533 */
534 void __init
smp_prepare_cpus(unsigned int max_cpus)535 smp_prepare_cpus (unsigned int max_cpus)
536 {
537 int boot_cpu_id = hard_smp_processor_id();
538
539 /*
540 * Initialize the per-CPU profiling counter/multiplier
541 */
542
543 smp_setup_percpu_timer();
544
545 cpumask_set_cpu(0, &cpu_callin_map);
546
547 local_cpu_data->loops_per_jiffy = loops_per_jiffy;
548 ia64_cpu_to_sapicid[0] = boot_cpu_id;
549
550 printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id);
551
552 current_thread_info()->cpu = 0;
553
554 /*
555 * If SMP should be disabled, then really disable it!
556 */
557 if (!max_cpus) {
558 printk(KERN_INFO "SMP mode deactivated.\n");
559 init_cpu_online(cpumask_of(0));
560 init_cpu_present(cpumask_of(0));
561 init_cpu_possible(cpumask_of(0));
562 return;
563 }
564 }
565
smp_prepare_boot_cpu(void)566 void smp_prepare_boot_cpu(void)
567 {
568 set_cpu_online(smp_processor_id(), true);
569 cpumask_set_cpu(smp_processor_id(), &cpu_callin_map);
570 set_numa_node(cpu_to_node_map[smp_processor_id()]);
571 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
572 paravirt_post_smp_prepare_boot_cpu();
573 }
574
575 #ifdef CONFIG_HOTPLUG_CPU
576 static inline void
clear_cpu_sibling_map(int cpu)577 clear_cpu_sibling_map(int cpu)
578 {
579 int i;
580
581 for_each_cpu(i, &per_cpu(cpu_sibling_map, cpu))
582 cpumask_clear_cpu(cpu, &per_cpu(cpu_sibling_map, i));
583 for_each_cpu(i, &cpu_core_map[cpu])
584 cpumask_clear_cpu(cpu, &cpu_core_map[i]);
585
586 per_cpu(cpu_sibling_map, cpu) = cpu_core_map[cpu] = CPU_MASK_NONE;
587 }
588
589 static void
remove_siblinginfo(int cpu)590 remove_siblinginfo(int cpu)
591 {
592 int last = 0;
593
594 if (cpu_data(cpu)->threads_per_core == 1 &&
595 cpu_data(cpu)->cores_per_socket == 1) {
596 cpumask_clear_cpu(cpu, &cpu_core_map[cpu]);
597 cpumask_clear_cpu(cpu, &per_cpu(cpu_sibling_map, cpu));
598 return;
599 }
600
601 last = (cpumask_weight(&cpu_core_map[cpu]) == 1 ? 1 : 0);
602
603 /* remove it from all sibling map's */
604 clear_cpu_sibling_map(cpu);
605 }
606
607 extern void fixup_irqs(void);
608
migrate_platform_irqs(unsigned int cpu)609 int migrate_platform_irqs(unsigned int cpu)
610 {
611 int new_cpei_cpu;
612 struct irq_data *data = NULL;
613 const struct cpumask *mask;
614 int retval = 0;
615
616 /*
617 * dont permit CPEI target to removed.
618 */
619 if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) {
620 printk ("CPU (%d) is CPEI Target\n", cpu);
621 if (can_cpei_retarget()) {
622 /*
623 * Now re-target the CPEI to a different processor
624 */
625 new_cpei_cpu = cpumask_any(cpu_online_mask);
626 mask = cpumask_of(new_cpei_cpu);
627 set_cpei_target_cpu(new_cpei_cpu);
628 data = irq_get_irq_data(ia64_cpe_irq);
629 /*
630 * Switch for now, immediately, we need to do fake intr
631 * as other interrupts, but need to study CPEI behaviour with
632 * polling before making changes.
633 */
634 if (data && data->chip) {
635 data->chip->irq_disable(data);
636 data->chip->irq_set_affinity(data, mask, false);
637 data->chip->irq_enable(data);
638 printk ("Re-targeting CPEI to cpu %d\n", new_cpei_cpu);
639 }
640 }
641 if (!data) {
642 printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu);
643 retval = -EBUSY;
644 }
645 }
646 return retval;
647 }
648
649 /* must be called with cpucontrol mutex held */
__cpu_disable(void)650 int __cpu_disable(void)
651 {
652 int cpu = smp_processor_id();
653
654 /*
655 * dont permit boot processor for now
656 */
657 if (cpu == 0 && !bsp_remove_ok) {
658 printk ("Your platform does not support removal of BSP\n");
659 return (-EBUSY);
660 }
661
662 if (ia64_platform_is("sn2")) {
663 if (!sn_cpu_disable_allowed(cpu))
664 return -EBUSY;
665 }
666
667 set_cpu_online(cpu, false);
668
669 if (migrate_platform_irqs(cpu)) {
670 set_cpu_online(cpu, true);
671 return -EBUSY;
672 }
673
674 remove_siblinginfo(cpu);
675 fixup_irqs();
676 local_flush_tlb_all();
677 cpumask_clear_cpu(cpu, &cpu_callin_map);
678 return 0;
679 }
680
__cpu_die(unsigned int cpu)681 void __cpu_die(unsigned int cpu)
682 {
683 unsigned int i;
684
685 for (i = 0; i < 100; i++) {
686 /* They ack this in play_dead by setting CPU_DEAD */
687 if (per_cpu(cpu_state, cpu) == CPU_DEAD)
688 {
689 printk ("CPU %d is now offline\n", cpu);
690 return;
691 }
692 msleep(100);
693 }
694 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
695 }
696 #endif /* CONFIG_HOTPLUG_CPU */
697
698 void
smp_cpus_done(unsigned int dummy)699 smp_cpus_done (unsigned int dummy)
700 {
701 int cpu;
702 unsigned long bogosum = 0;
703
704 /*
705 * Allow the user to impress friends.
706 */
707
708 for_each_online_cpu(cpu) {
709 bogosum += cpu_data(cpu)->loops_per_jiffy;
710 }
711
712 printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
713 (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100);
714 }
715
set_cpu_sibling_map(int cpu)716 static inline void set_cpu_sibling_map(int cpu)
717 {
718 int i;
719
720 for_each_online_cpu(i) {
721 if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) {
722 cpumask_set_cpu(i, &cpu_core_map[cpu]);
723 cpumask_set_cpu(cpu, &cpu_core_map[i]);
724 if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) {
725 cpumask_set_cpu(i,
726 &per_cpu(cpu_sibling_map, cpu));
727 cpumask_set_cpu(cpu,
728 &per_cpu(cpu_sibling_map, i));
729 }
730 }
731 }
732 }
733
734 int
__cpu_up(unsigned int cpu,struct task_struct * tidle)735 __cpu_up(unsigned int cpu, struct task_struct *tidle)
736 {
737 int ret;
738 int sapicid;
739
740 sapicid = ia64_cpu_to_sapicid[cpu];
741 if (sapicid == -1)
742 return -EINVAL;
743
744 /*
745 * Already booted cpu? not valid anymore since we dont
746 * do idle loop tightspin anymore.
747 */
748 if (cpumask_test_cpu(cpu, &cpu_callin_map))
749 return -EINVAL;
750
751 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
752 /* Processor goes to start_secondary(), sets online flag */
753 ret = do_boot_cpu(sapicid, cpu, tidle);
754 if (ret < 0)
755 return ret;
756
757 if (cpu_data(cpu)->threads_per_core == 1 &&
758 cpu_data(cpu)->cores_per_socket == 1) {
759 cpumask_set_cpu(cpu, &per_cpu(cpu_sibling_map, cpu));
760 cpumask_set_cpu(cpu, &cpu_core_map[cpu]);
761 return 0;
762 }
763
764 set_cpu_sibling_map(cpu);
765
766 return 0;
767 }
768
769 /*
770 * Assume that CPUs have been discovered by some platform-dependent interface. For
771 * SoftSDV/Lion, that would be ACPI.
772 *
773 * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP().
774 */
775 void __init
init_smp_config(void)776 init_smp_config(void)
777 {
778 struct fptr {
779 unsigned long fp;
780 unsigned long gp;
781 } *ap_startup;
782 long sal_ret;
783
784 /* Tell SAL where to drop the APs. */
785 ap_startup = (struct fptr *) start_ap;
786 sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ,
787 ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0);
788 if (sal_ret < 0)
789 printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n",
790 ia64_sal_strerror(sal_ret));
791 }
792
793 /*
794 * identify_siblings(cpu) gets called from identify_cpu. This populates the
795 * information related to logical execution units in per_cpu_data structure.
796 */
identify_siblings(struct cpuinfo_ia64 * c)797 void identify_siblings(struct cpuinfo_ia64 *c)
798 {
799 long status;
800 u16 pltid;
801 pal_logical_to_physical_t info;
802
803 status = ia64_pal_logical_to_phys(-1, &info);
804 if (status != PAL_STATUS_SUCCESS) {
805 if (status != PAL_STATUS_UNIMPLEMENTED) {
806 printk(KERN_ERR
807 "ia64_pal_logical_to_phys failed with %ld\n",
808 status);
809 return;
810 }
811
812 info.overview_ppid = 0;
813 info.overview_cpp = 1;
814 info.overview_tpc = 1;
815 }
816
817 status = ia64_sal_physical_id_info(&pltid);
818 if (status != PAL_STATUS_SUCCESS) {
819 if (status != PAL_STATUS_UNIMPLEMENTED)
820 printk(KERN_ERR
821 "ia64_sal_pltid failed with %ld\n",
822 status);
823 return;
824 }
825
826 c->socket_id = (pltid << 8) | info.overview_ppid;
827
828 if (info.overview_cpp == 1 && info.overview_tpc == 1)
829 return;
830
831 c->cores_per_socket = info.overview_cpp;
832 c->threads_per_core = info.overview_tpc;
833 c->num_log = info.overview_num_log;
834
835 c->core_id = info.log1_cid;
836 c->thread_id = info.log1_tid;
837 }
838
839 /*
840 * returns non zero, if multi-threading is enabled
841 * on at least one physical package. Due to hotplug cpu
842 * and (maxcpus=), all threads may not necessarily be enabled
843 * even though the processor supports multi-threading.
844 */
is_multithreading_enabled(void)845 int is_multithreading_enabled(void)
846 {
847 int i, j;
848
849 for_each_present_cpu(i) {
850 for_each_present_cpu(j) {
851 if (j == i)
852 continue;
853 if ((cpu_data(j)->socket_id == cpu_data(i)->socket_id)) {
854 if (cpu_data(j)->core_id == cpu_data(i)->core_id)
855 return 1;
856 }
857 }
858 }
859 return 0;
860 }
861 EXPORT_SYMBOL_GPL(is_multithreading_enabled);
862