1/*
2 * DMA implementation for Hexagon
3 *
4 * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and
8 * only version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301, USA.
19 */
20
21#include <linux/dma-mapping.h>
22#include <linux/bootmem.h>
23#include <linux/genalloc.h>
24#include <asm/dma-mapping.h>
25#include <linux/module.h>
26#include <asm/page.h>
27
28struct dma_map_ops *dma_ops;
29EXPORT_SYMBOL(dma_ops);
30
31int bad_dma_address;  /*  globals are automatically initialized to zero  */
32
33static inline void *dma_addr_to_virt(dma_addr_t dma_addr)
34{
35	return phys_to_virt((unsigned long) dma_addr);
36}
37
38int dma_supported(struct device *dev, u64 mask)
39{
40	if (mask == DMA_BIT_MASK(32))
41		return 1;
42	else
43		return 0;
44}
45EXPORT_SYMBOL(dma_supported);
46
47int dma_set_mask(struct device *dev, u64 mask)
48{
49	if (!dev->dma_mask || !dma_supported(dev, mask))
50		return -EIO;
51
52	*dev->dma_mask = mask;
53
54	return 0;
55}
56EXPORT_SYMBOL(dma_set_mask);
57
58static struct gen_pool *coherent_pool;
59
60
61/* Allocates from a pool of uncached memory that was reserved at boot time */
62
63static void *hexagon_dma_alloc_coherent(struct device *dev, size_t size,
64				 dma_addr_t *dma_addr, gfp_t flag,
65				 struct dma_attrs *attrs)
66{
67	void *ret;
68
69	/*
70	 * Our max_low_pfn should have been backed off by 16MB in
71	 * mm/init.c to create DMA coherent space.  Use that as the VA
72	 * for the pool.
73	 */
74
75	if (coherent_pool == NULL) {
76		coherent_pool = gen_pool_create(PAGE_SHIFT, -1);
77
78		if (coherent_pool == NULL)
79			panic("Can't create %s() memory pool!", __func__);
80		else
81			gen_pool_add(coherent_pool,
82				pfn_to_virt(max_low_pfn),
83				hexagon_coherent_pool_size, -1);
84	}
85
86	ret = (void *) gen_pool_alloc(coherent_pool, size);
87
88	if (ret) {
89		memset(ret, 0, size);
90		*dma_addr = (dma_addr_t) virt_to_phys(ret);
91	} else
92		*dma_addr = ~0;
93
94	return ret;
95}
96
97static void hexagon_free_coherent(struct device *dev, size_t size, void *vaddr,
98				  dma_addr_t dma_addr, struct dma_attrs *attrs)
99{
100	gen_pool_free(coherent_pool, (unsigned long) vaddr, size);
101}
102
103static int check_addr(const char *name, struct device *hwdev,
104		      dma_addr_t bus, size_t size)
105{
106	if (hwdev && hwdev->dma_mask && !dma_capable(hwdev, bus, size)) {
107		if (*hwdev->dma_mask >= DMA_BIT_MASK(32))
108			printk(KERN_ERR
109				"%s: overflow %Lx+%zu of device mask %Lx\n",
110				name, (long long)bus, size,
111				(long long)*hwdev->dma_mask);
112		return 0;
113	}
114	return 1;
115}
116
117static int hexagon_map_sg(struct device *hwdev, struct scatterlist *sg,
118			  int nents, enum dma_data_direction dir,
119			  struct dma_attrs *attrs)
120{
121	struct scatterlist *s;
122	int i;
123
124	WARN_ON(nents == 0 || sg[0].length == 0);
125
126	for_each_sg(sg, s, nents, i) {
127		s->dma_address = sg_phys(s);
128		if (!check_addr("map_sg", hwdev, s->dma_address, s->length))
129			return 0;
130
131		s->dma_length = s->length;
132
133		flush_dcache_range(dma_addr_to_virt(s->dma_address),
134				   dma_addr_to_virt(s->dma_address + s->length));
135	}
136
137	return nents;
138}
139
140/*
141 * address is virtual
142 */
143static inline void dma_sync(void *addr, size_t size,
144			    enum dma_data_direction dir)
145{
146	switch (dir) {
147	case DMA_TO_DEVICE:
148		hexagon_clean_dcache_range((unsigned long) addr,
149		(unsigned long) addr + size);
150		break;
151	case DMA_FROM_DEVICE:
152		hexagon_inv_dcache_range((unsigned long) addr,
153		(unsigned long) addr + size);
154		break;
155	case DMA_BIDIRECTIONAL:
156		flush_dcache_range((unsigned long) addr,
157		(unsigned long) addr + size);
158		break;
159	default:
160		BUG();
161	}
162}
163
164/**
165 * hexagon_map_page() - maps an address for device DMA
166 * @dev:	pointer to DMA device
167 * @page:	pointer to page struct of DMA memory
168 * @offset:	offset within page
169 * @size:	size of memory to map
170 * @dir:	transfer direction
171 * @attrs:	pointer to DMA attrs (not used)
172 *
173 * Called to map a memory address to a DMA address prior
174 * to accesses to/from device.
175 *
176 * We don't particularly have many hoops to jump through
177 * so far.  Straight translation between phys and virtual.
178 *
179 * DMA is not cache coherent so sync is necessary; this
180 * seems to be a convenient place to do it.
181 *
182 */
183static dma_addr_t hexagon_map_page(struct device *dev, struct page *page,
184				   unsigned long offset, size_t size,
185				   enum dma_data_direction dir,
186				   struct dma_attrs *attrs)
187{
188	dma_addr_t bus = page_to_phys(page) + offset;
189	WARN_ON(size == 0);
190
191	if (!check_addr("map_single", dev, bus, size))
192		return bad_dma_address;
193
194	dma_sync(dma_addr_to_virt(bus), size, dir);
195
196	return bus;
197}
198
199static void hexagon_sync_single_for_cpu(struct device *dev,
200					dma_addr_t dma_handle, size_t size,
201					enum dma_data_direction dir)
202{
203	dma_sync(dma_addr_to_virt(dma_handle), size, dir);
204}
205
206static void hexagon_sync_single_for_device(struct device *dev,
207					dma_addr_t dma_handle, size_t size,
208					enum dma_data_direction dir)
209{
210	dma_sync(dma_addr_to_virt(dma_handle), size, dir);
211}
212
213struct dma_map_ops hexagon_dma_ops = {
214	.alloc		= hexagon_dma_alloc_coherent,
215	.free		= hexagon_free_coherent,
216	.map_sg		= hexagon_map_sg,
217	.map_page	= hexagon_map_page,
218	.sync_single_for_cpu = hexagon_sync_single_for_cpu,
219	.sync_single_for_device = hexagon_sync_single_for_device,
220	.is_phys	= 1,
221};
222
223void __init hexagon_dma_init(void)
224{
225	if (dma_ops)
226		return;
227
228	dma_ops = &hexagon_dma_ops;
229}
230