1/* 2 * bfin_twi.h - interface to Blackfin TWIs 3 * 4 * Copyright 2005-2010 Analog Devices Inc. 5 * 6 * Licensed under the GPL-2 or later. 7 */ 8 9#ifndef __ASM_BFIN_TWI_H__ 10#define __ASM_BFIN_TWI_H__ 11 12#include <asm/blackfin.h> 13 14#define DEFINE_TWI_REG(reg_name, reg) \ 15static inline u16 read_##reg_name(struct bfin_twi_iface *iface) \ 16 { return bfin_read16(&iface->regs_base->reg); } \ 17static inline void write_##reg_name(struct bfin_twi_iface *iface, u16 v) \ 18 { bfin_write16(&iface->regs_base->reg, v); } 19 20DEFINE_TWI_REG(CLKDIV, clkdiv) 21DEFINE_TWI_REG(SLAVE_CTL, slave_ctl) 22DEFINE_TWI_REG(SLAVE_STAT, slave_stat) 23DEFINE_TWI_REG(SLAVE_ADDR, slave_addr) 24DEFINE_TWI_REG(MASTER_CTL, master_ctl) 25DEFINE_TWI_REG(MASTER_STAT, master_stat) 26DEFINE_TWI_REG(MASTER_ADDR, master_addr) 27DEFINE_TWI_REG(INT_STAT, int_stat) 28DEFINE_TWI_REG(INT_MASK, int_mask) 29DEFINE_TWI_REG(FIFO_STAT, fifo_stat) 30DEFINE_TWI_REG(XMT_DATA8, xmt_data8) 31DEFINE_TWI_REG(XMT_DATA16, xmt_data16) 32#if !ANOMALY_16000030 33DEFINE_TWI_REG(RCV_DATA8, rcv_data8) 34DEFINE_TWI_REG(RCV_DATA16, rcv_data16) 35#else 36static inline u16 read_RCV_DATA8(struct bfin_twi_iface *iface) 37{ 38 u16 ret; 39 unsigned long flags; 40 41 flags = hard_local_irq_save(); 42 ret = bfin_read16(&iface->regs_base->rcv_data8); 43 hard_local_irq_restore(flags); 44 45 return ret; 46} 47 48static inline u16 read_RCV_DATA16(struct bfin_twi_iface *iface) 49{ 50 u16 ret; 51 unsigned long flags; 52 53 flags = hard_local_irq_save(); 54 ret = bfin_read16(&iface->regs_base->rcv_data16); 55 hard_local_irq_restore(flags); 56 57 return ret; 58} 59#endif 60 61static inline u16 read_FIFO_CTL(struct bfin_twi_iface *iface) 62{ 63 return bfin_read16(&iface->regs_base->fifo_ctl); 64} 65 66static inline void write_FIFO_CTL(struct bfin_twi_iface *iface, u16 v) 67{ 68 bfin_write16(&iface->regs_base->fifo_ctl, v); 69 SSYNC(); 70} 71 72static inline u16 read_CONTROL(struct bfin_twi_iface *iface) 73{ 74 return bfin_read16(&iface->regs_base->control); 75} 76 77static inline void write_CONTROL(struct bfin_twi_iface *iface, u16 v) 78{ 79 SSYNC(); 80 bfin_write16(&iface->regs_base->control, v); 81} 82#endif 83