1/*
2 * Copyright (c) 2014, The Linux Foundation. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef _DT_BINDINGS_CLK_APQ_MMCC_8084_H
15#define _DT_BINDINGS_CLK_APQ_MMCC_8084_H
16
17#define MMSS_AHB_CLK_SRC		0
18#define MMSS_AXI_CLK_SRC		1
19#define MMPLL0				2
20#define MMPLL0_VOTE			3
21#define MMPLL1				4
22#define MMPLL1_VOTE			5
23#define MMPLL2				6
24#define MMPLL3				7
25#define MMPLL4				8
26#define CSI0_CLK_SRC			9
27#define CSI1_CLK_SRC			10
28#define CSI2_CLK_SRC			11
29#define CSI3_CLK_SRC			12
30#define VCODEC0_CLK_SRC			13
31#define VFE0_CLK_SRC			14
32#define VFE1_CLK_SRC			15
33#define MDP_CLK_SRC			16
34#define PCLK0_CLK_SRC			17
35#define PCLK1_CLK_SRC			18
36#define OCMEMNOC_CLK_SRC		19
37#define GFX3D_CLK_SRC			20
38#define JPEG0_CLK_SRC			21
39#define JPEG1_CLK_SRC			22
40#define JPEG2_CLK_SRC			23
41#define EDPPIXEL_CLK_SRC		24
42#define EXTPCLK_CLK_SRC			25
43#define VP_CLK_SRC			26
44#define CCI_CLK_SRC			27
45#define CAMSS_GP0_CLK_SRC		28
46#define CAMSS_GP1_CLK_SRC		29
47#define MCLK0_CLK_SRC			30
48#define MCLK1_CLK_SRC			31
49#define MCLK2_CLK_SRC			32
50#define MCLK3_CLK_SRC			33
51#define CSI0PHYTIMER_CLK_SRC		34
52#define CSI1PHYTIMER_CLK_SRC		35
53#define CSI2PHYTIMER_CLK_SRC		36
54#define CPP_CLK_SRC			37
55#define BYTE0_CLK_SRC			38
56#define BYTE1_CLK_SRC			39
57#define EDPAUX_CLK_SRC			40
58#define EDPLINK_CLK_SRC			41
59#define ESC0_CLK_SRC			42
60#define ESC1_CLK_SRC			43
61#define HDMI_CLK_SRC			44
62#define VSYNC_CLK_SRC			45
63#define MMSS_RBCPR_CLK_SRC		46
64#define RBBMTIMER_CLK_SRC		47
65#define MAPLE_CLK_SRC			48
66#define VDP_CLK_SRC			49
67#define VPU_BUS_CLK_SRC			50
68#define MMSS_CXO_CLK			51
69#define MMSS_SLEEPCLK_CLK		52
70#define AVSYNC_AHB_CLK			53
71#define AVSYNC_EDPPIXEL_CLK		54
72#define AVSYNC_EXTPCLK_CLK		55
73#define AVSYNC_PCLK0_CLK		56
74#define AVSYNC_PCLK1_CLK		57
75#define AVSYNC_VP_CLK			58
76#define CAMSS_AHB_CLK			59
77#define CAMSS_CCI_CCI_AHB_CLK		60
78#define CAMSS_CCI_CCI_CLK		61
79#define CAMSS_CSI0_AHB_CLK		62
80#define CAMSS_CSI0_CLK			63
81#define CAMSS_CSI0PHY_CLK		64
82#define CAMSS_CSI0PIX_CLK		65
83#define CAMSS_CSI0RDI_CLK		66
84#define CAMSS_CSI1_AHB_CLK		67
85#define CAMSS_CSI1_CLK			68
86#define CAMSS_CSI1PHY_CLK		69
87#define CAMSS_CSI1PIX_CLK		70
88#define CAMSS_CSI1RDI_CLK		71
89#define CAMSS_CSI2_AHB_CLK		72
90#define CAMSS_CSI2_CLK			73
91#define CAMSS_CSI2PHY_CLK		74
92#define CAMSS_CSI2PIX_CLK		75
93#define CAMSS_CSI2RDI_CLK		76
94#define CAMSS_CSI3_AHB_CLK		77
95#define CAMSS_CSI3_CLK			78
96#define CAMSS_CSI3PHY_CLK		79
97#define CAMSS_CSI3PIX_CLK		80
98#define CAMSS_CSI3RDI_CLK		81
99#define CAMSS_CSI_VFE0_CLK		82
100#define CAMSS_CSI_VFE1_CLK		83
101#define CAMSS_GP0_CLK			84
102#define CAMSS_GP1_CLK			85
103#define CAMSS_ISPIF_AHB_CLK		86
104#define CAMSS_JPEG_JPEG0_CLK		87
105#define CAMSS_JPEG_JPEG1_CLK		88
106#define CAMSS_JPEG_JPEG2_CLK		89
107#define CAMSS_JPEG_JPEG_AHB_CLK		90
108#define CAMSS_JPEG_JPEG_AXI_CLK		91
109#define CAMSS_MCLK0_CLK			92
110#define CAMSS_MCLK1_CLK			93
111#define CAMSS_MCLK2_CLK			94
112#define CAMSS_MCLK3_CLK			95
113#define CAMSS_MICRO_AHB_CLK		96
114#define CAMSS_PHY0_CSI0PHYTIMER_CLK	97
115#define CAMSS_PHY1_CSI1PHYTIMER_CLK	98
116#define CAMSS_PHY2_CSI2PHYTIMER_CLK	99
117#define CAMSS_TOP_AHB_CLK		100
118#define CAMSS_VFE_CPP_AHB_CLK		101
119#define CAMSS_VFE_CPP_CLK		102
120#define CAMSS_VFE_VFE0_CLK		103
121#define CAMSS_VFE_VFE1_CLK		104
122#define CAMSS_VFE_VFE_AHB_CLK		105
123#define CAMSS_VFE_VFE_AXI_CLK		106
124#define MDSS_AHB_CLK			107
125#define MDSS_AXI_CLK			108
126#define MDSS_BYTE0_CLK			109
127#define MDSS_BYTE1_CLK			110
128#define MDSS_EDPAUX_CLK			111
129#define MDSS_EDPLINK_CLK		112
130#define MDSS_EDPPIXEL_CLK		113
131#define MDSS_ESC0_CLK			114
132#define MDSS_ESC1_CLK			115
133#define MDSS_EXTPCLK_CLK		116
134#define MDSS_HDMI_AHB_CLK		117
135#define MDSS_HDMI_CLK			118
136#define MDSS_MDP_CLK			119
137#define MDSS_MDP_LUT_CLK		120
138#define MDSS_PCLK0_CLK			121
139#define MDSS_PCLK1_CLK			122
140#define MDSS_VSYNC_CLK			123
141#define MMSS_RBCPR_AHB_CLK		124
142#define MMSS_RBCPR_CLK			125
143#define MMSS_SPDM_AHB_CLK		126
144#define MMSS_SPDM_AXI_CLK		127
145#define MMSS_SPDM_CSI0_CLK		128
146#define MMSS_SPDM_GFX3D_CLK		129
147#define MMSS_SPDM_JPEG0_CLK		130
148#define MMSS_SPDM_JPEG1_CLK		131
149#define MMSS_SPDM_JPEG2_CLK		132
150#define MMSS_SPDM_MDP_CLK		133
151#define MMSS_SPDM_PCLK0_CLK		134
152#define MMSS_SPDM_PCLK1_CLK		135
153#define MMSS_SPDM_VCODEC0_CLK		136
154#define MMSS_SPDM_VFE0_CLK		137
155#define MMSS_SPDM_VFE1_CLK		138
156#define MMSS_SPDM_RM_AXI_CLK		139
157#define MMSS_SPDM_RM_OCMEMNOC_CLK	140
158#define MMSS_MISC_AHB_CLK		141
159#define MMSS_MMSSNOC_AHB_CLK		142
160#define MMSS_MMSSNOC_BTO_AHB_CLK	143
161#define MMSS_MMSSNOC_AXI_CLK		144
162#define MMSS_S0_AXI_CLK			145
163#define OCMEMCX_AHB_CLK			146
164#define OCMEMCX_OCMEMNOC_CLK		147
165#define OXILI_OCMEMGX_CLK		148
166#define OXILI_GFX3D_CLK			149
167#define OXILI_RBBMTIMER_CLK		150
168#define OXILICX_AHB_CLK			151
169#define VENUS0_AHB_CLK			152
170#define VENUS0_AXI_CLK			153
171#define VENUS0_CORE0_VCODEC_CLK		154
172#define VENUS0_CORE1_VCODEC_CLK		155
173#define VENUS0_OCMEMNOC_CLK		156
174#define VENUS0_VCODEC0_CLK		157
175#define VPU_AHB_CLK			158
176#define VPU_AXI_CLK			159
177#define VPU_BUS_CLK			160
178#define VPU_CXO_CLK			161
179#define VPU_MAPLE_CLK			162
180#define VPU_SLEEP_CLK			163
181#define VPU_VDP_CLK			164
182
183#endif
184