1/*
2 *  linux/arch/arm/mm/proc-arm720.S: MMU functions for ARM720
3 *
4 *  Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
5 *                     Rob Scott (rscott@mtrob.fdns.net)
6 *  Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd.
7 *  hacked for non-paged-MM by Hyok S. Choi, 2004.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
22 *
23 *
24 * These are the low level assembler for performing cache and TLB
25 * functions on the ARM720T.  The ARM720T has a writethrough IDC
26 * cache, so we don't need to clean it.
27 *
28 *  Changelog:
29 *   05-09-2000 SJH	Created by moving 720 specific functions
30 *			out of 'proc-arm6,7.S' per RMK discussion
31 *   07-25-2000 SJH	Added idle function.
32 *   08-25-2000	DBS	Updated for integration of ARM Ltd version.
33 *   04-20-2004 HSC	modified for non-paged memory management mode.
34 */
35#include <linux/linkage.h>
36#include <linux/init.h>
37#include <asm/assembler.h>
38#include <asm/asm-offsets.h>
39#include <asm/hwcap.h>
40#include <asm/pgtable-hwdef.h>
41#include <asm/pgtable.h>
42#include <asm/ptrace.h>
43
44#include "proc-macros.S"
45
46/*
47 * Function: arm720_proc_init (void)
48 *	   : arm720_proc_fin (void)
49 *
50 * Notes   : This processor does not require these
51 */
52ENTRY(cpu_arm720_dcache_clean_area)
53ENTRY(cpu_arm720_proc_init)
54		ret	lr
55
56ENTRY(cpu_arm720_proc_fin)
57		mrc	p15, 0, r0, c1, c0, 0
58		bic	r0, r0, #0x1000			@ ...i............
59		bic	r0, r0, #0x000e			@ ............wca.
60		mcr	p15, 0, r0, c1, c0, 0		@ disable caches
61		ret	lr
62
63/*
64 * Function: arm720_proc_do_idle(void)
65 * Params  : r0 = unused
66 * Purpose : put the processor in proper idle mode
67 */
68ENTRY(cpu_arm720_do_idle)
69		ret	lr
70
71/*
72 * Function: arm720_switch_mm(unsigned long pgd_phys)
73 * Params  : pgd_phys	Physical address of page table
74 * Purpose : Perform a task switch, saving the old process' state and restoring
75 *	     the new.
76 */
77ENTRY(cpu_arm720_switch_mm)
78#ifdef CONFIG_MMU
79		mov	r1, #0
80		mcr	p15, 0, r1, c7, c7, 0		@ invalidate cache
81		mcr	p15, 0, r0, c2, c0, 0		@ update page table ptr
82		mcr	p15, 0, r1, c8, c7, 0		@ flush TLB (v4)
83#endif
84		ret	lr
85
86/*
87 * Function: arm720_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext)
88 * Params  : r0 = Address to set
89 *	   : r1 = value to set
90 * Purpose : Set a PTE and flush it out of any WB cache
91 */
92	.align	5
93ENTRY(cpu_arm720_set_pte_ext)
94#ifdef CONFIG_MMU
95	armv3_set_pte_ext wc_disable=0
96#endif
97	ret	lr
98
99/*
100 * Function: arm720_reset
101 * Params  : r0 = address to jump to
102 * Notes   : This sets up everything for a reset
103 */
104		.pushsection	.idmap.text, "ax"
105ENTRY(cpu_arm720_reset)
106		mov	ip, #0
107		mcr	p15, 0, ip, c7, c7, 0		@ invalidate cache
108#ifdef CONFIG_MMU
109		mcr	p15, 0, ip, c8, c7, 0		@ flush TLB (v4)
110#endif
111		mrc	p15, 0, ip, c1, c0, 0		@ get ctrl register
112		bic	ip, ip, #0x000f			@ ............wcam
113		bic	ip, ip, #0x2100			@ ..v....s........
114		mcr	p15, 0, ip, c1, c0, 0		@ ctrl register
115		ret	r0
116ENDPROC(cpu_arm720_reset)
117		.popsection
118
119	.type	__arm710_setup, #function
120__arm710_setup:
121	mov	r0, #0
122	mcr	p15, 0, r0, c7, c7, 0		@ invalidate caches
123#ifdef CONFIG_MMU
124	mcr	p15, 0, r0, c8, c7, 0		@ flush TLB (v4)
125#endif
126	mrc	p15, 0, r0, c1, c0		@ get control register
127	ldr	r5, arm710_cr1_clear
128	bic	r0, r0, r5
129	ldr	r5, arm710_cr1_set
130	orr	r0, r0, r5
131	ret	lr				@ __ret (head.S)
132	.size	__arm710_setup, . - __arm710_setup
133
134	/*
135	 *  R
136	 * .RVI ZFRS BLDP WCAM
137	 * .... 0001 ..11 1101
138	 *
139	 */
140	.type	arm710_cr1_clear, #object
141	.type	arm710_cr1_set, #object
142arm710_cr1_clear:
143	.word	0x0f3f
144arm710_cr1_set:
145	.word	0x013d
146
147	.type	__arm720_setup, #function
148__arm720_setup:
149	mov	r0, #0
150	mcr	p15, 0, r0, c7, c7, 0		@ invalidate caches
151#ifdef CONFIG_MMU
152	mcr	p15, 0, r0, c8, c7, 0		@ flush TLB (v4)
153#endif
154	adr	r5, arm720_crval
155	ldmia	r5, {r5, r6}
156	mrc	p15, 0, r0, c1, c0		@ get control register
157	bic	r0, r0, r5
158	orr	r0, r0, r6
159	ret	lr				@ __ret (head.S)
160	.size	__arm720_setup, . - __arm720_setup
161
162	/*
163	 *  R
164	 * .RVI ZFRS BLDP WCAM
165	 * ..1. 1001 ..11 1101
166	 *
167	 */
168	.type	arm720_crval, #object
169arm720_crval:
170	crval	clear=0x00002f3f, mmuset=0x0000213d, ucset=0x00000130
171
172		__INITDATA
173	@ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
174	define_processor_functions arm720, dabort=v4t_late_abort, pabort=legacy_pabort
175
176		.section ".rodata"
177
178	string	cpu_arch_name, "armv4t"
179	string	cpu_elf_name, "v4"
180	string	cpu_arm710_name, "ARM710T"
181	string	cpu_arm720_name, "ARM720T"
182
183		.align
184
185/*
186 * See <asm/procinfo.h> for a definition of this structure.
187 */
188
189		.section ".proc.info.init", #alloc
190
191.macro arm720_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cpu_flush:req
192		.type	__\name\()_proc_info,#object
193__\name\()_proc_info:
194		.long	\cpu_val
195		.long	\cpu_mask
196		.long   PMD_TYPE_SECT | \
197			PMD_SECT_BUFFERABLE | \
198			PMD_SECT_CACHEABLE | \
199			PMD_BIT4 | \
200			PMD_SECT_AP_WRITE | \
201			PMD_SECT_AP_READ
202		.long   PMD_TYPE_SECT | \
203			PMD_BIT4 | \
204			PMD_SECT_AP_WRITE | \
205			PMD_SECT_AP_READ
206		initfn	\cpu_flush, __\name\()_proc_info	@ cpu_flush
207		.long	cpu_arch_name				@ arch_name
208		.long	cpu_elf_name				@ elf_name
209		.long	HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB	@ elf_hwcap
210		.long	\cpu_name
211		.long	arm720_processor_functions
212		.long	v4_tlb_fns
213		.long	v4wt_user_fns
214		.long	v4_cache_fns
215		.size	__\name\()_proc_info, . - __\name\()_proc_info
216.endm
217
218	arm720_proc_info arm710, 0x41807100, 0xffffff00, cpu_arm710_name, __arm710_setup
219	arm720_proc_info arm720, 0x41807200, 0xffffff00, cpu_arm720_name, __arm720_setup
220