1/*
2 * OMAP4+ Power Management Routines
3 *
4 * Copyright (C) 2010-2013 Texas Instruments, Inc.
5 * Rajendra Nayak <rnayak@ti.com>
6 * Santosh Shilimkar <santosh.shilimkar@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/pm.h>
14#include <linux/suspend.h>
15#include <linux/module.h>
16#include <linux/list.h>
17#include <linux/err.h>
18#include <linux/slab.h>
19#include <asm/system_misc.h>
20
21#include "soc.h"
22#include "common.h"
23#include "clockdomain.h"
24#include "powerdomain.h"
25#include "pm.h"
26
27u16 pm44xx_errata;
28
29struct power_state {
30	struct powerdomain *pwrdm;
31	u32 next_state;
32	u32 next_logic_state;
33#ifdef CONFIG_SUSPEND
34	u32 saved_state;
35	u32 saved_logic_state;
36#endif
37	struct list_head node;
38};
39
40/**
41 * struct static_dep_map - Static dependency map
42 * @from:	from clockdomain
43 * @to:		to clockdomain
44  */
45struct static_dep_map {
46	const char *from;
47	const char *to;
48};
49
50static u32 cpu_suspend_state = PWRDM_POWER_OFF;
51
52static LIST_HEAD(pwrst_list);
53
54#ifdef CONFIG_SUSPEND
55static int omap4_pm_suspend(void)
56{
57	struct power_state *pwrst;
58	int state, ret = 0;
59	u32 cpu_id = smp_processor_id();
60
61	/* Save current powerdomain state */
62	list_for_each_entry(pwrst, &pwrst_list, node) {
63		pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm);
64		pwrst->saved_logic_state = pwrdm_read_logic_retst(pwrst->pwrdm);
65	}
66
67	/* Set targeted power domain states by suspend */
68	list_for_each_entry(pwrst, &pwrst_list, node) {
69		omap_set_pwrdm_state(pwrst->pwrdm, pwrst->next_state);
70		pwrdm_set_logic_retst(pwrst->pwrdm, pwrst->next_logic_state);
71	}
72
73	/*
74	 * For MPUSS to hit power domain retention(CSWR or OSWR),
75	 * CPU0 and CPU1 power domains need to be in OFF or DORMANT state,
76	 * since CPU power domain CSWR is not supported by hardware
77	 * Only master CPU follows suspend path. All other CPUs follow
78	 * CPU hotplug path in system wide suspend. On OMAP4, CPU power
79	 * domain CSWR is not supported by hardware.
80	 * More details can be found in OMAP4430 TRM section 4.3.4.2.
81	 */
82	omap4_enter_lowpower(cpu_id, cpu_suspend_state);
83
84	/* Restore next powerdomain state */
85	list_for_each_entry(pwrst, &pwrst_list, node) {
86		state = pwrdm_read_prev_pwrst(pwrst->pwrdm);
87		if (state > pwrst->next_state) {
88			pr_info("Powerdomain (%s) didn't enter target state %d\n",
89				pwrst->pwrdm->name, pwrst->next_state);
90			ret = -1;
91		}
92		omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state);
93		pwrdm_set_logic_retst(pwrst->pwrdm, pwrst->saved_logic_state);
94	}
95	if (ret) {
96		pr_crit("Could not enter target state in pm_suspend\n");
97		/*
98		 * OMAP4 chip PM currently works only with certain (newer)
99		 * versions of bootloaders. This is due to missing code in the
100		 * kernel to properly reset and initialize some devices.
101		 * Warn the user about the bootloader version being one of the
102		 * possible causes.
103		 * http://www.spinics.net/lists/arm-kernel/msg218641.html
104		 */
105		pr_warn("A possible cause could be an old bootloader - try u-boot >= v2012.07\n");
106	} else {
107		pr_info("Successfully put all powerdomains to target state\n");
108	}
109
110	return 0;
111}
112#else
113#define omap4_pm_suspend NULL
114#endif /* CONFIG_SUSPEND */
115
116static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
117{
118	struct power_state *pwrst;
119
120	if (!pwrdm->pwrsts)
121		return 0;
122
123	/*
124	 * Skip CPU0 and CPU1 power domains. CPU1 is programmed
125	 * through hotplug path and CPU0 explicitly programmed
126	 * further down in the code path
127	 */
128	if (!strncmp(pwrdm->name, "cpu", 3)) {
129		if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE))
130			cpu_suspend_state = PWRDM_POWER_RET;
131		return 0;
132	}
133
134	pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC);
135	if (!pwrst)
136		return -ENOMEM;
137
138	pwrst->pwrdm = pwrdm;
139	pwrst->next_state = pwrdm_get_valid_lp_state(pwrdm, false,
140						     PWRDM_POWER_RET);
141	pwrst->next_logic_state = pwrdm_get_valid_lp_state(pwrdm, true,
142							   PWRDM_POWER_OFF);
143
144	list_add(&pwrst->node, &pwrst_list);
145
146	return omap_set_pwrdm_state(pwrst->pwrdm, pwrst->next_state);
147}
148
149/**
150 * omap_default_idle - OMAP4 default ilde routine.'
151 *
152 * Implements OMAP4 memory, IO ordering requirements which can't be addressed
153 * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPU_IDLE and
154 * by secondary CPU with CONFIG_CPU_IDLE.
155 */
156static void omap_default_idle(void)
157{
158	omap_do_wfi();
159}
160
161/*
162 * The dynamic dependency between MPUSS -> MEMIF and
163 * MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as
164 * expected. The hardware recommendation is to enable static
165 * dependencies for these to avoid system lock ups or random crashes.
166 * The L4 wakeup depedency is added to workaround the OCP sync hardware
167 * BUG with 32K synctimer which lead to incorrect timer value read
168 * from the 32K counter. The BUG applies for GPTIMER1 and WDT2 which
169 * are part of L4 wakeup clockdomain.
170 */
171static const struct static_dep_map omap4_static_dep_map[] = {
172	{.from = "mpuss_clkdm", .to = "l3_emif_clkdm"},
173	{.from = "mpuss_clkdm", .to = "l3_1_clkdm"},
174	{.from = "mpuss_clkdm", .to = "l3_2_clkdm"},
175	{.from = "ducati_clkdm", .to = "l3_1_clkdm"},
176	{.from = "ducati_clkdm", .to = "l3_2_clkdm"},
177	{.from  = NULL} /* TERMINATION */
178};
179
180static const struct static_dep_map omap5_dra7_static_dep_map[] = {
181	{.from = "mpu_clkdm", .to = "emif_clkdm"},
182	{.from  = NULL} /* TERMINATION */
183};
184
185/**
186 * omap4plus_init_static_deps() - Initialize a static dependency map
187 * @map:	Mapping of clock domains
188 */
189static inline int omap4plus_init_static_deps(const struct static_dep_map *map)
190{
191	int ret;
192	struct clockdomain *from, *to;
193
194	if (!map)
195		return 0;
196
197	while (map->from) {
198		from = clkdm_lookup(map->from);
199		to = clkdm_lookup(map->to);
200		if (!from || !to) {
201			pr_err("Failed lookup %s or %s for wakeup dependency\n",
202			       map->from, map->to);
203			return -EINVAL;
204		}
205		ret = clkdm_add_wkdep(from, to);
206		if (ret) {
207			pr_err("Failed to add %s -> %s wakeup dependency(%d)\n",
208			       map->from, map->to, ret);
209			return ret;
210		}
211
212		map++;
213	};
214
215	return 0;
216}
217
218/**
219 * omap4_pm_init_early - Does early initialization necessary for OMAP4+ devices
220 *
221 * Initializes basic stuff for power management functionality.
222 */
223int __init omap4_pm_init_early(void)
224{
225	if (cpu_is_omap446x())
226		pm44xx_errata |= PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD;
227
228	if (soc_is_omap54xx() || soc_is_dra7xx())
229		pm44xx_errata |= PM_OMAP4_CPU_OSWR_DISABLE;
230
231	return 0;
232}
233
234/**
235 * omap4_pm_init - Init routine for OMAP4+ devices
236 *
237 * Initializes all powerdomain and clockdomain target states
238 * and all PRCM settings.
239 * Return: Returns the error code returned by called functions.
240 */
241int __init omap4_pm_init(void)
242{
243	int ret = 0;
244
245	if (omap_rev() == OMAP4430_REV_ES1_0) {
246		WARN(1, "Power Management not supported on OMAP4430 ES1.0\n");
247		return -ENODEV;
248	}
249
250	pr_info("Power Management for TI OMAP4+ devices.\n");
251
252	/*
253	 * OMAP4 chip PM currently works only with certain (newer)
254	 * versions of bootloaders. This is due to missing code in the
255	 * kernel to properly reset and initialize some devices.
256	 * http://www.spinics.net/lists/arm-kernel/msg218641.html
257	 */
258	if (cpu_is_omap44xx())
259		pr_warn("OMAP4 PM: u-boot >= v2012.07 is required for full PM support\n");
260
261	ret = pwrdm_for_each(pwrdms_setup, NULL);
262	if (ret) {
263		pr_err("Failed to setup powerdomains.\n");
264		goto err2;
265	}
266
267	if (cpu_is_omap44xx())
268		ret = omap4plus_init_static_deps(omap4_static_dep_map);
269	else if (soc_is_omap54xx() || soc_is_dra7xx())
270		ret = omap4plus_init_static_deps(omap5_dra7_static_dep_map);
271
272	if (ret) {
273		pr_err("Failed to initialise static dependencies.\n");
274		goto err2;
275	}
276
277	ret = omap4_mpuss_init();
278	if (ret) {
279		pr_err("Failed to initialise OMAP4 MPUSS\n");
280		goto err2;
281	}
282
283	(void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
284
285	omap_common_suspend_init(omap4_pm_suspend);
286
287	/* Overwrite the default cpu_do_idle() */
288	arm_pm_idle = omap_default_idle;
289
290	if (cpu_is_omap44xx())
291		omap4_idle_init();
292
293err2:
294	return ret;
295}
296