1/*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Gated clock implementation
10 */
11
12#include <linux/clk-provider.h>
13#include <linux/module.h>
14#include <linux/slab.h>
15#include <linux/io.h>
16#include <linux/err.h>
17#include <linux/string.h>
18#include "clk.h"
19
20/**
21 * DOC: basic gatable clock which can gate and ungate it's ouput
22 *
23 * Traits of this clock:
24 * prepare - clk_(un)prepare only ensures parent is (un)prepared
25 * enable - clk_enable and clk_disable are functional & control gating
26 * rate - inherits rate from parent.  No clk_set_rate support
27 * parent - fixed parent.  No clk_set_parent support
28 */
29
30struct clk_gate2 {
31	struct clk_hw hw;
32	void __iomem	*reg;
33	u8		bit_idx;
34	u8		flags;
35	spinlock_t	*lock;
36	unsigned int	*share_count;
37};
38
39#define to_clk_gate2(_hw) container_of(_hw, struct clk_gate2, hw)
40
41static int clk_gate2_enable(struct clk_hw *hw)
42{
43	struct clk_gate2 *gate = to_clk_gate2(hw);
44	u32 reg;
45	unsigned long flags = 0;
46
47	spin_lock_irqsave(gate->lock, flags);
48
49	if (gate->share_count && (*gate->share_count)++ > 0)
50		goto out;
51
52	reg = readl(gate->reg);
53	reg |= 3 << gate->bit_idx;
54	writel(reg, gate->reg);
55
56out:
57	spin_unlock_irqrestore(gate->lock, flags);
58
59	return 0;
60}
61
62static void clk_gate2_disable(struct clk_hw *hw)
63{
64	struct clk_gate2 *gate = to_clk_gate2(hw);
65	u32 reg;
66	unsigned long flags = 0;
67
68	spin_lock_irqsave(gate->lock, flags);
69
70	if (gate->share_count) {
71		if (WARN_ON(*gate->share_count == 0))
72			goto out;
73		else if (--(*gate->share_count) > 0)
74			goto out;
75	}
76
77	reg = readl(gate->reg);
78	reg &= ~(3 << gate->bit_idx);
79	writel(reg, gate->reg);
80
81out:
82	spin_unlock_irqrestore(gate->lock, flags);
83}
84
85static int clk_gate2_reg_is_enabled(void __iomem *reg, u8 bit_idx)
86{
87	u32 val = readl(reg);
88
89	if (((val >> bit_idx) & 1) == 1)
90		return 1;
91
92	return 0;
93}
94
95static int clk_gate2_is_enabled(struct clk_hw *hw)
96{
97	struct clk_gate2 *gate = to_clk_gate2(hw);
98
99	return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx);
100}
101
102static void clk_gate2_disable_unused(struct clk_hw *hw)
103{
104	struct clk_gate2 *gate = to_clk_gate2(hw);
105	unsigned long flags = 0;
106	u32 reg;
107
108	spin_lock_irqsave(gate->lock, flags);
109
110	if (!gate->share_count || *gate->share_count == 0) {
111		reg = readl(gate->reg);
112		reg &= ~(3 << gate->bit_idx);
113		writel(reg, gate->reg);
114	}
115
116	spin_unlock_irqrestore(gate->lock, flags);
117}
118
119static struct clk_ops clk_gate2_ops = {
120	.enable = clk_gate2_enable,
121	.disable = clk_gate2_disable,
122	.disable_unused = clk_gate2_disable_unused,
123	.is_enabled = clk_gate2_is_enabled,
124};
125
126struct clk *clk_register_gate2(struct device *dev, const char *name,
127		const char *parent_name, unsigned long flags,
128		void __iomem *reg, u8 bit_idx,
129		u8 clk_gate2_flags, spinlock_t *lock,
130		unsigned int *share_count)
131{
132	struct clk_gate2 *gate;
133	struct clk *clk;
134	struct clk_init_data init;
135
136	gate = kzalloc(sizeof(struct clk_gate2), GFP_KERNEL);
137	if (!gate)
138		return ERR_PTR(-ENOMEM);
139
140	/* struct clk_gate2 assignments */
141	gate->reg = reg;
142	gate->bit_idx = bit_idx;
143	gate->flags = clk_gate2_flags;
144	gate->lock = lock;
145	gate->share_count = share_count;
146
147	init.name = name;
148	init.ops = &clk_gate2_ops;
149	init.flags = flags;
150	init.parent_names = parent_name ? &parent_name : NULL;
151	init.num_parents = parent_name ? 1 : 0;
152
153	gate->hw.init = &init;
154
155	clk = clk_register(dev, &gate->hw);
156	if (IS_ERR(clk))
157		kfree(gate);
158
159	return clk;
160}
161