1/*
2 * Copyright 2012 ST-Ericsson AB
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include "ste-dbx5x0.dtsi"
13#include "ste-href-ab8500.dtsi"
14#include "ste-href.dtsi"
15
16/ {
17	model = "ST-Ericsson HREF (v60+) platform with Device Tree";
18	compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
19
20	soc {
21		// External Micro SD slot
22		sdi0_per1@80126000 {
23			cd-gpios  = <&gpio2 31 0x4>; // 95
24		};
25
26		vmmci: regulator-gpio {
27			gpios = <&gpio0 5 0x4>;
28			enable-gpio = <&gpio5 9 0x4>;
29		};
30
31		pinctrl {
32			/*
33			 * Set this up using hogs, as time goes by and as seems fit, these
34			 * can be moved over to being controlled by respective device.
35			 */
36			pinctrl-names = "default";
37			pinctrl-0 = <&ipgpio_hrefv60_mode>,
38				  <&etm_hrefv60_mode>,
39				  <&nahj_hrefv60_mode>,
40				  <&nfc_hrefv60_mode>,
41				  <&force_hrefv60_mode>,
42				  <&dipro_hrefv60_mode>,
43				  <&vaudio_hf_hrefv60_mode>,
44				  <&gbf_hrefv60_mode>,
45				  <&hdtv_hrefv60_mode>,
46				  <&touch_hrefv60_mode>;
47
48			sdi0 {
49				/* SD card detect GPIO pin, extend default state */
50				sdi0_default_mode: sdi0_default {
51					default_hrefv60_cfg1 {
52						pins = "GPIO95_E8";
53						ste,config = <&gpio_in_pu>;
54					};
55				};
56			};
57			ipgpio {
58				/*
59				 * XENON Flashgun on image processor GPIO (controlled from image
60				 * processor firmware), mux in these image processor GPIO lines 0
61				 * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
62				 * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
63				 * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
64				 */
65				ipgpio_hrefv60_mode: ipgpio_hrefv60 {
66					hrefv60_mux {
67						function = "ipgpio";
68						groups = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1";
69					};
70					hrefv60_cfg1 {
71						pins = "GPIO6_AF6", "GPIO7_AG5";
72						ste,config = <&in_pu>;
73					};
74					hrefv60_cfg2 {
75						pins = "GPIO21_AB3";
76						ste,config = <&gpio_out_lo>;
77					};
78					hrefv60_cfg3 {
79						pins = "GPIO64_F3";
80						ste,config = <&out_lo>;
81					};
82				};
83			};
84			etm {
85				/*
86				 * Drive D19-D23 for the ETM PTM trace interface low,
87				 * (presumably pins are unconnected therefore grounded here,
88				 * the "other alt C1" setting enables these pins)
89				 */
90				etm_hrefv60_mode: etm_hrefv60 {
91					hrefv60_cfg1 {
92						pins =
93						"GPIO70_G5",
94						"GPIO71_G4",
95						"GPIO72_H4",
96						"GPIO73_H3",
97						"GPIO74_J3";
98						ste,config = <&gpio_out_lo>;
99					};
100				 };
101			};
102			nahj {
103				nahj_hrefv60_mode: nahj_hrefv60 {
104					/* NAHJ CTRL on GPIO76 to low, CTRL_INV on GPIO216 to high */
105					hrefv60_cfg1 {
106						pins = "GPIO76_J2";
107						ste,config = <&gpio_out_lo>;
108					};
109					hrefv60_cfg2 {
110						pins = "GPIO216_AG12";
111						ste,config = <&gpio_out_hi>;
112					};
113				 };
114			};
115			nfc {
116				nfc_hrefv60_mode: nfc_hrefv60 {
117					/* NFC ENA and RESET to low, pulldown IRQ line */
118					hrefv60_cfg1 {
119						pins =
120						"GPIO77_H1", /* NFC_ENA */
121						"GPIO142_C11"; /* NFC_RESET */
122						ste,config = <&gpio_out_lo>;
123					};
124					hrefv60_cfg2 {
125						pins = "GPIO144_B13"; /* NFC_IRQ */
126						ste,config = <&gpio_in_pd>;
127					};
128				 };
129			};
130			force {
131				force_hrefv60_mode: force_hrefv60 {
132					hrefv60_cfg1 {
133						pins = "GPIO91_B6"; /* FORCE_SENSING_INT */
134						ste,config = <&gpio_in_pu>;
135					};
136					hrefv60_cfg2 {
137						pins =
138						"GPIO92_D6", /* FORCE_SENSING_RST */
139						"GPIO97_D9"; /* FORCE_SENSING_WU */
140						ste,config = <&gpio_out_lo>;
141					};
142				 };
143			};
144			dipro {
145				dipro_hrefv60_mode: dipro_hrefv60 {
146					hrefv60_cfg1 {
147						pins = "GPIO139_C9"; /* DIPRO_INT */
148						ste,config = <&gpio_in_pu>;
149					};
150				 };
151			};
152			vaudio_hf {
153				vaudio_hf_hrefv60_mode: vaudio_hf_hrefv60 {
154					/* Audio Amplifier HF enable GPIO */
155					hrefv60_cfg1 {
156						pins = "GPIO149_B14"; /* VAUDIO_HF_EN, enable MAX8968 */
157						ste,config = <&gpio_out_hi>;
158					};
159				 };
160			};
161			gbf {
162				gbf_hrefv60_mode: gbf_hrefv60 {
163					/*
164					 * GBF (GPS, Bluetooth, FM-radio) interface,
165					 * pull low to reset state
166					 */
167					hrefv60_cfg1 {
168						pins = "GPIO171_D23"; /* GBF_ENA_RESET */
169						ste,config = <&gpio_out_lo>;
170					};
171				 };
172			};
173			hdtv {
174				hdtv_hrefv60_mode: hdtv_hrefv60 {
175					/* MSP : HDTV INTERFACE GPIO line */
176					hrefv60_cfg1 {
177						pins = "GPIO192_AJ27";
178						ste,config = <&gpio_in_pd>;
179					};
180				 };
181			};
182			touch {
183				touch_hrefv60_mode: touch_hrefv60 {
184					/*
185					 * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
186					 * GPIO 67 for interrupts. Pull-up the IRQ line and drive both
187					 * reset signals low.
188					 */
189					hrefv60_cfg1 {
190						pins = "GPIO143_D12", "GPIO146_D13";
191						ste,config = <&gpio_out_lo>;
192					};
193					hrefv60_cfg2 {
194						pins = "GPIO67_G2";
195						ste,config = <&gpio_in_pu>;
196					};
197				};
198			};
199			mcde {
200				lcd_hrefv60_mode: lcd_hrefv60 {
201					/*
202					 * Display Interface 1 uses GPIO 65 for RST (reset).
203					 * Display Interface 2 uses GPIO 66 for RST (reset).
204					 * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
205					 */
206					hrefv60_cfg1 {
207						pins ="GPIO65_F1";
208						ste,config = <&gpio_out_hi>;
209					};
210					hrefv60_cfg2 {
211						pins ="GPIO66_G3";
212						ste,config = <&gpio_out_lo>;
213					};
214				};
215			};
216		};
217	};
218};
219