1/*
2 * Device Tree file for OpenBlocks A7 board
3 *
4 * Copyright (C) 2013 Free Electrons
5 *
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2.  This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13/dts-v1/;
14
15#include "kirkwood.dtsi"
16#include "kirkwood-6282.dtsi"
17
18/ {
19	model = "Plat'Home OpenBlocksA7";
20	compatible = "plathome,openblocks-a7", "marvell,kirkwood-88f6283", "marvell,kirkwood";
21
22	memory {
23		device_type = "memory";
24		reg = <0x00000000 0x40000000>; /* 1 GB */
25	};
26
27	chosen {
28		bootargs = "console=ttyS0,115200n8 earlyprintk";
29		stdout-path = &uart0;
30	};
31
32	ocp@f1000000 {
33		serial@12000 {
34			status = "okay";
35		};
36
37		serial@12100 {
38			status = "okay";
39		};
40
41		sata@80000 {
42			nr-ports = <1>;
43			status = "okay";
44		};
45
46		i2c@11100 {
47			status = "okay";
48
49			s24c02: s24c02@50 {
50				compatible = "atmel,24c02";
51				reg = <0x50>;
52			};
53		};
54
55		pinctrl: pin-controller@10000 {
56			pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>;
57			pinctrl-names = "default";
58
59			pmx_uart0: pmx-uart0 {
60				marvell,pins = "mpp10", "mpp11", "mpp15",
61					"mpp16";
62				marvell,function = "uart0";
63			};
64
65			pmx_uart1: pmx-uart1 {
66				marvell,pins = "mpp13", "mpp14", "mpp8",
67					"mpp9";
68				marvell,function = "uart1";
69			};
70
71			pmx_sysrst: pmx-sysrst {
72				marvell,pins = "mpp6";
73				marvell,function = "sysrst";
74			};
75
76			pmx_dip_switches: pmx-dip-switches {
77				marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47";
78				marvell,function = "gpio";
79			};
80
81			/*
82			 * Accessible on connector J202. The MPP
83			 * listed below are pin 1-7, pin 8 is unused,
84			 * pin 9 is external reset input and pin 10 is
85			 * ground.
86			 */
87			pmx_gpio_header: pmx-gpio-header {
88				marvell,pins = "mpp17", "mpp7", "mpp29", "mpp28",
89					       "mpp35", "mpp34", "mpp40";
90				marvell,function = "gpio";
91			};
92
93			pmx_gpio_init: pmx-init {
94				marvell,pins = "mpp38";
95				marvell,function = "gpio";
96			};
97
98			pmx_usb_oc: pmx-usb-oc {
99				marvell,pins = "mpp39";
100				marvell,function = "gpio";
101			};
102
103			pmx_leds: pmx-leds {
104				marvell,pins = "mpp41", "mpp42", "mpp43";
105				marvell,function = "gpio";
106			};
107		};
108	};
109
110	gpio-leds {
111		compatible = "gpio-leds";
112		pinctrl-0 = <&pmx_leds>;
113		pinctrl-names = "default";
114
115		led-red {
116			label = "obsa7:red:stat";
117			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
118		};
119
120		led-green {
121			label = "obsa7:green:stat";
122			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
123		};
124
125		led-yellow {
126			label = "obsa7:yellow:stat";
127			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
128		};
129        };
130
131	gpio_keys {
132		compatible = "gpio-keys";
133		pinctrl-0 = <&pmx_gpio_init>;
134		pinctrl-names = "default";
135		#address-cells = <1>;
136		#size-cells = <0>;
137
138		button@1 {
139			label = "Init Button";
140			linux,code = <KEY_POWER>;
141			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
142		};
143	};
144};
145
146&nand {
147	chip-delay = <25>;
148	status = "okay";
149
150	partition@0 {
151		label = "uboot";
152		reg = <0x0 0x1c0000>;
153	};
154
155	partition@1c0000 {
156		label = "env";
157		reg = <0x1c0000 0x2c0000>;
158	};
159
160	partition@480000 {
161		label = "test";
162		reg = <0x480000 0x160000>;
163	};
164
165	partition@5e0000 {
166		label = "conf";
167		reg = <0x5e0000 0x540000>;
168	};
169
170	partition@b20000 {
171		label = "linux";
172		reg = <0xb20000 0x3d40000>;
173	};
174
175	partition@4860000 {
176		label = "user";
177		reg = <0x4860000 0xb7a0000>;
178	};
179};
180
181&mdio {
182	status = "okay";
183
184	ethphy0: ethernet-phy@0 {
185		reg = <0>;
186	};
187
188	ethphy1: ethernet-phy@1 {
189		reg = <1>;
190	};
191};
192
193&eth0 {
194	status = "okay";
195	ethernet0-port@0 {
196		phy-handle = <&ethphy0>;
197	};
198};
199
200&eth1 {
201	status = "okay";
202	ethernet1-port@0 {
203		phy-handle = <&ethphy1>;
204	};
205};
206