1/*
2 * Samsung's Exynos4412 SoC device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 *		http://www.samsung.com
6 *
7 * Samsung's Exynos4412 SoC device nodes are listed in this file. Exynos4412
8 * based board files can include this file and provide values for board specfic
9 * bindings.
10 *
11 * Note: This file does not include device nodes for all the controllers in
12 * Exynos4412 SoC. As device tree coverage for Exynos4412 increases, additional
13 * nodes can be added to this file.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18*/
19
20#include "exynos4x12.dtsi"
21
22/ {
23	compatible = "samsung,exynos4412", "samsung,exynos4";
24
25	cpus {
26		#address-cells = <1>;
27		#size-cells = <0>;
28
29		cpu0: cpu@A00 {
30			device_type = "cpu";
31			compatible = "arm,cortex-a9";
32			reg = <0xA00>;
33			cooling-min-level = <13>;
34			cooling-max-level = <7>;
35			#cooling-cells = <2>; /* min followed by max */
36		};
37
38		cpu@A01 {
39			device_type = "cpu";
40			compatible = "arm,cortex-a9";
41			reg = <0xA01>;
42		};
43
44		cpu@A02 {
45			device_type = "cpu";
46			compatible = "arm,cortex-a9";
47			reg = <0xA02>;
48		};
49
50		cpu@A03 {
51			device_type = "cpu";
52			compatible = "arm,cortex-a9";
53			reg = <0xA03>;
54		};
55	};
56
57	combiner: interrupt-controller@10440000 {
58		samsung,combiner-nr = <20>;
59	};
60
61	pmu {
62		interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
63	};
64
65	gic: interrupt-controller@10490000 {
66		cpu-offset = <0x4000>;
67	};
68
69	pmu_system_controller: system-controller@10020000 {
70		compatible = "samsung,exynos4412-pmu", "syscon";
71	};
72};
73