1This page describes the structures and procedures used by the cx2341x DMA 2engine. 3 4Introduction 5============ 6 7The cx2341x PCI interface is busmaster capable. This means it has a DMA 8engine to efficiently transfer large volumes of data between the card and main 9memory without requiring help from a CPU. Like most hardware, it must operate 10on contiguous physical memory. This is difficult to come by in large quantities 11on virtual memory machines. 12 13Therefore, it also supports a technique called "scatter-gather". The card can 14transfer multiple buffers in one operation. Instead of allocating one large 15contiguous buffer, the driver can allocate several smaller buffers. 16 17In practice, I've seen the average transfer to be roughly 80K, but transfers 18above 128K were not uncommon, particularly at startup. The 128K figure is 19important, because that is the largest block that the kernel can normally 20allocate. Even still, 128K blocks are hard to come by, so the driver writer is 21urged to choose a smaller block size and learn the scatter-gather technique. 22 23Mailbox #10 is reserved for DMA transfer information. 24 25Note: the hardware expects little-endian data ('intel format'). 26 27Flow 28==== 29 30This section describes, in general, the order of events when handling DMA 31transfers. Detailed information follows this section. 32 33- The card raises the Encoder interrupt. 34- The driver reads the transfer type, offset and size from Mailbox #10. 35- The driver constructs the scatter-gather array from enough free dma buffers 36 to cover the size. 37- The driver schedules the DMA transfer via the ScheduleDMAtoHost API call. 38- The card raises the DMA Complete interrupt. 39- The driver checks the DMA status register for any errors. 40- The driver post-processes the newly transferred buffers. 41 42NOTE! It is possible that the Encoder and DMA Complete interrupts get raised 43simultaneously. (End of the last, start of the next, etc.) 44 45Mailbox #10 46=========== 47 48The Flags, Command, Return Value and Timeout fields are ignored. 49 50Name: Mailbox #10 51Results[0]: Type: 0: MPEG. 52Results[1]: Offset: The position relative to the card's memory space. 53Results[2]: Size: The exact number of bytes to transfer. 54 55My speculation is that since the StartCapture API has a capture type of "RAW" 56available, that the type field will have other values that correspond to YUV 57and PCM data. 58 59Scatter-Gather Array 60==================== 61 62The scatter-gather array is a contiguously allocated block of memory that 63tells the card the source and destination of each data-block to transfer. 64Card "addresses" are derived from the offset supplied by Mailbox #10. Host 65addresses are the physical memory location of the target DMA buffer. 66 67Each S-G array element is a struct of three 32-bit words. The first word is 68the source address, the second is the destination address. Both take up the 69entire 32 bits. The lowest 18 bits of the third word is the transfer byte 70count. The high-bit of the third word is the "last" flag. The last-flag tells 71the card to raise the DMA_DONE interrupt. From hard personal experience, if 72you forget to set this bit, the card will still "work" but the stream will 73most likely get corrupted. 74 75The transfer count must be a multiple of 256. Therefore, the driver will need 76to track how much data in the target buffer is valid and deal with it 77accordingly. 78 79Array Element: 80 81- 32-bit Source Address 82- 32-bit Destination Address 83- 14-bit reserved (high bit is the last flag) 84- 18-bit byte count 85 86DMA Transfer Status 87=================== 88 89Register 0x0004 holds the DMA Transfer Status: 90 91Bit 920 read completed 931 write completed 942 DMA read error 953 DMA write error 964 Scatter-Gather array error 97