1Qualcomm MSM8960 TLMM block 2 3This binding describes the Top Level Mode Multiplexer block found in the 4MSM8960 platform. 5 6- compatible: 7 Usage: required 8 Value type: <string> 9 Definition: must be "qcom,msm8960-pinctrl" 10 11- reg: 12 Usage: required 13 Value type: <prop-encoded-array> 14 Definition: the base address and size of the TLMM register space. 15 16- interrupts: 17 Usage: required 18 Value type: <prop-encoded-array> 19 Definition: should specify the TLMM summary IRQ. 20 21- interrupt-controller: 22 Usage: required 23 Value type: <none> 24 Definition: identifies this node as an interrupt controller 25 26- #interrupt-cells: 27 Usage: required 28 Value type: <u32> 29 Definition: must be 2. Specifying the pin number and flags, as defined 30 in <dt-bindings/interrupt-controller/irq.h> 31 32- gpio-controller: 33 Usage: required 34 Value type: <none> 35 Definition: identifies this node as a gpio controller 36 37- #gpio-cells: 38 Usage: required 39 Value type: <u32> 40 Definition: must be 2. Specifying the pin number and flags, as defined 41 in <dt-bindings/gpio/gpio.h> 42 43Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for 44a general description of GPIO and interrupt bindings. 45 46Please refer to pinctrl-bindings.txt in this directory for details of the 47common pinctrl bindings used by client devices, including the meaning of the 48phrase "pin configuration node". 49 50The pin configuration nodes act as a container for an arbitrary number of 51subnodes. Each of these subnodes represents some desired configuration for a 52pin, a group, or a list of pins or groups. This configuration can include the 53mux function to select on those pin(s)/group(s), and various pin configuration 54parameters, such as pull-up, drive strength, etc. 55 56 57PIN CONFIGURATION NODES: 58 59The name of each subnode is not important; all subnodes should be enumerated 60and processed purely based on their content. 61 62Each subnode only affects those parameters that are explicitly listed. In 63other words, a subnode that lists a mux function but no pin configuration 64parameters implies no information about any pin configuration parameters. 65Similarly, a pin subnode that describes a pullup parameter implies no 66information about e.g. the mux function. 67 68 69The following generic properties as defined in pinctrl-bindings.txt are valid 70to specify in a pin configuration subnode: 71 72- pins: 73 Usage: required 74 Value type: <string-array> 75 Definition: List of gpio pins affected by the properties specified in 76 this subnode. Valid pins are: 77 gpio0-gpio151, 78 sdc1_clk, 79 sdc1_cmd, 80 sdc1_data 81 sdc3_clk, 82 sdc3_cmd, 83 sdc3_data 84 85- function: 86 Usage: required 87 Value type: <string> 88 Definition: Specify the alternative function to be configured for the 89 specified pins. Functions are only valid for gpio pins. 90 Valid values are: 91 audio_pcm, bt, cam_mclk0, cam_mclk1, cam_mclk2, 92 codec_mic_i2s, codec_spkr_i2s, ext_gps, fm, gps_blanking, 93 gps_pps_in, gps_pps_out, gp_clk_0a, gp_clk_0b, gp_clk_1a, 94 gp_clk_1b, gp_clk_2a, gp_clk_2b, gp_mn, gp_pdm_0a, 95 gp_pdm_0b, gp_pdm_1a, gp_pdm_1b, gp_pdm_2a, gp_pdm_2b, gpio, 96 gsbi1, gsbi1_spi_cs1_n, gsbi1_spi_cs2a_n, gsbi1_spi_cs2b_n, 97 gsbi1_spi_cs3_n, gsbi2, gsbi2_spi_cs1_n, gsbi2_spi_cs2_n, 98 gsbi2_spi_cs3_n, gsbi3, gsbi4, gsbi4_3d_cam_i2c_l, 99 gsbi4_3d_cam_i2c_r, gsbi5, gsbi5_3d_cam_i2c_l, 100 gsbi5_3d_cam_i2c_r, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, 101 gsbi11, gsbi11_spi_cs1a_n, gsbi11_spi_cs1b_n, 102 gsbi11_spi_cs2a_n, gsbi11_spi_cs2b_n, gsbi11_spi_cs3_n, 103 gsbi12, hdmi_cec, hdmi_ddc_clock, hdmi_ddc_data, 104 hdmi_hot_plug_detect, hsic, mdp_vsync, mi2s, mic_i2s, 105 pmb_clk, pmb_ext_ctrl, ps_hold, rpm_wdog, sdc2, sdc4, sdc5, 106 slimbus1, slimbus2, spkr_i2s, ssbi1, ssbi2, ssbi_ext_gps, 107 ssbi_pmic2, ssbi_qpa1, ssbi_ts, tsif1, tsif2, ts_eoc, 108 usb_fs1, usb_fs1_oe, usb_fs1_oe_n, usb_fs2, usb_fs2_oe, 109 usb_fs2_oe_n, vfe_camif_timer1_a, vfe_camif_timer1_b, 110 vfe_camif_timer2, vfe_camif_timer3_a, vfe_camif_timer3_b, 111 vfe_camif_timer4_a, vfe_camif_timer4_b, vfe_camif_timer4_c, 112 vfe_camif_timer5_a, vfe_camif_timer5_b, vfe_camif_timer6_a, 113 vfe_camif_timer6_b, vfe_camif_timer6_c, vfe_camif_timer7_a, 114 vfe_camif_timer7_b, vfe_camif_timer7_c, wlan 115 116- bias-disable: 117 Usage: optional 118 Value type: <none> 119 Definition: The specified pins should be configued as no pull. 120 121- bias-pull-down: 122 Usage: optional 123 Value type: <none> 124 Definition: The specified pins should be configued as pull down. 125 126- bias-pull-up: 127 Usage: optional 128 Value type: <none> 129 Definition: The specified pins should be configued as pull up. 130 131- output-high: 132 Usage: optional 133 Value type: <none> 134 Definition: The specified pins are configured in output mode, driven 135 high. 136 Not valid for sdc pins. 137 138- output-low: 139 Usage: optional 140 Value type: <none> 141 Definition: The specified pins are configured in output mode, driven 142 low. 143 Not valid for sdc pins. 144 145- drive-strength: 146 Usage: optional 147 Value type: <u32> 148 Definition: Selects the drive strength for the specified pins, in mA. 149 Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16 150 151Example: 152 153 msmgpio: pinctrl@800000 { 154 compatible = "qcom,msm8960-pinctrl"; 155 reg = <0x800000 0x4000>; 156 157 gpio-controller; 158 #gpio-cells = <2>; 159 interrupt-controller; 160 #interrupt-cells = <2>; 161 interrupts = <0 16 0x4>; 162 163 gsbi8_uart: gsbi8-uart { 164 mux { 165 pins = "gpio34", "gpio35"; 166 function = "gsbi8"; 167 }; 168 169 tx { 170 pins = "gpio34"; 171 drive-strength = <4>; 172 bias-disable; 173 }; 174 175 rx { 176 pins = "gpio35"; 177 drive-strength = <2>; 178 bias-pull-up; 179 }; 180 }; 181 }; 182