1PXA3xx NAND DT bindings
2
3Required properties:
4
5 - compatible:		Should be set to one of the following:
6			marvell,pxa3xx-nand
7			marvell,armada370-nand
8 - reg: 		The register base for the controller
9 - interrupts:		The interrupt to map
10 - #address-cells:	Set to <1> if the node includes partitions
11
12Optional properties:
13
14 - marvell,nand-enable-arbiter:	Set to enable the bus arbiter
15 - marvell,nand-keep-config:	Set to keep the NAND controller config as set
16				by the bootloader
17 - num-cs:			Number of chipselect lines to use
18 - nand-on-flash-bbt: 		boolean to enable on flash bbt option if
19				not present false
20 - nand-ecc-strength:           number of bits to correct per ECC step
21 - nand-ecc-step-size:          number of data bytes covered by a single ECC step
22
23The following ECC strength and step size are currently supported:
24
25 - nand-ecc-strength = <1>, nand-ecc-step-size = <512>
26 - nand-ecc-strength = <4>, nand-ecc-step-size = <512>
27 - nand-ecc-strength = <8>, nand-ecc-step-size = <512>
28
29Example:
30
31	nand0: nand@43100000 {
32		compatible = "marvell,pxa3xx-nand";
33		reg = <0x43100000 90>;
34		interrupts = <45>;
35		#address-cells = <1>;
36
37		marvell,nand-enable-arbiter;
38		marvell,nand-keep-config;
39		num-cs = <1>;
40
41		/* partitions (optional) */
42	};
43
44