1<html><head><meta http-equiv="Content-Type" content="text/html; charset=ANSI_X3.4-1968"><title>Hardware control function</title><meta name="generator" content="DocBook XSL Stylesheets V1.78.1"><link rel="home" href="index.html" title="MTD NAND Driver Programming Interface"><link rel="up" href="basicboarddriver.html" title="Chapter 4. Basic board driver"><link rel="prev" href="Partition_defines.html" title="Partition defines"><link rel="next" href="Device_ready_function.html" title="Device ready function"></head><body bgcolor="white" text="black" link="#0000FF" vlink="#840084" alink="#0000FF"><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Hardware control function</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="Partition_defines.html">Prev</a> </td><th width="60%" align="center">Chapter 4. Basic board driver</th><td width="20%" align="right"> <a accesskey="n" href="Device_ready_function.html">Next</a></td></tr></table><hr></div><div class="sect1"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a name="Hardware_control_functions"></a>Hardware control function</h2></div></div></div><p> 2 The hardware control function provides access to the 3 control pins of the NAND chip(s). 4 The access can be done by GPIO pins or by address lines. 5 If you use address lines, make sure that the timing 6 requirements are met. 7 </p><p> 8 <span class="emphasis"><em>GPIO based example</em></span> 9 </p><pre class="programlisting"> 10static void board_hwcontrol(struct mtd_info *mtd, int cmd) 11{ 12 switch(cmd){ 13 case NAND_CTL_SETCLE: /* Set CLE pin high */ break; 14 case NAND_CTL_CLRCLE: /* Set CLE pin low */ break; 15 case NAND_CTL_SETALE: /* Set ALE pin high */ break; 16 case NAND_CTL_CLRALE: /* Set ALE pin low */ break; 17 case NAND_CTL_SETNCE: /* Set nCE pin low */ break; 18 case NAND_CTL_CLRNCE: /* Set nCE pin high */ break; 19 } 20} 21 </pre><p> 22 <span class="emphasis"><em>Address lines based example.</em></span> It's assumed that the 23 nCE pin is driven by a chip select decoder. 24 </p><pre class="programlisting"> 25static void board_hwcontrol(struct mtd_info *mtd, int cmd) 26{ 27 struct nand_chip *this = (struct nand_chip *) mtd->priv; 28 switch(cmd){ 29 case NAND_CTL_SETCLE: this->IO_ADDR_W |= CLE_ADRR_BIT; break; 30 case NAND_CTL_CLRCLE: this->IO_ADDR_W &= ~CLE_ADRR_BIT; break; 31 case NAND_CTL_SETALE: this->IO_ADDR_W |= ALE_ADRR_BIT; break; 32 case NAND_CTL_CLRALE: this->IO_ADDR_W &= ~ALE_ADRR_BIT; break; 33 } 34} 35 </pre></div><div class="navfooter"><hr><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="Partition_defines.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="basicboarddriver.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="Device_ready_function.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Partition defines </td><td width="20%" align="center"><a accesskey="h" href="index.html">Home</a></td><td width="40%" align="right" valign="top"> Device ready function</td></tr></table></div></body></html> 36