1<html><head><meta http-equiv="Content-Type" content="text/html; charset=ANSI_X3.4-1968"><title>struct nand_chip</title><meta name="generator" content="DocBook XSL Stylesheets V1.78.1"><link rel="home" href="index.html" title="MTD NAND Driver Programming Interface"><link rel="up" href="structs.html" title="Chapter&#160;9.&#160;Structures"><link rel="prev" href="API-struct-nand-buffers.html" title="struct nand_buffers"><link rel="next" href="API-struct-nand-flash-dev.html" title="struct nand_flash_dev"></head><body bgcolor="white" text="black" link="#0000FF" vlink="#840084" alink="#0000FF"><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center"><span class="phrase">struct nand_chip</span></th></tr><tr><td width="20%" align="left"><a accesskey="p" href="API-struct-nand-buffers.html">Prev</a>&#160;</td><th width="60%" align="center">Chapter&#160;9.&#160;Structures</th><td width="20%" align="right">&#160;<a accesskey="n" href="API-struct-nand-flash-dev.html">Next</a></td></tr></table><hr></div><div class="refentry"><a name="API-struct-nand-chip"></a><div class="titlepage"></div><div class="refnamediv"><h2>Name</h2><p>struct nand_chip &#8212; 
2     NAND Private Flash Chip Data
3 </p></div><div class="refsynopsisdiv"><h2>Synopsis</h2><pre class="programlisting">
4struct nand_chip {
5  void __iomem * IO_ADDR_R;
6  void __iomem * IO_ADDR_W;
7  uint8_t (* read_byte) (struct mtd_info *mtd);
8  u16 (* read_word) (struct mtd_info *mtd);
9  void (* write_byte) (struct mtd_info *mtd, uint8_t byte);
10  void (* write_buf) (struct mtd_info *mtd, const uint8_t *buf, int len);
11  void (* read_buf) (struct mtd_info *mtd, uint8_t *buf, int len);
12  void (* select_chip) (struct mtd_info *mtd, int chip);
13  int (* block_bad) (struct mtd_info *mtd, loff_t ofs, int getchip);
14  int (* block_markbad) (struct mtd_info *mtd, loff_t ofs);
15  void (* cmd_ctrl) (struct mtd_info *mtd, int dat, unsigned int ctrl);
16  int (* init_size) (struct mtd_info *mtd, struct nand_chip *this,u8 *id_data);
17  int (* dev_ready) (struct mtd_info *mtd);
18  void (* cmdfunc) (struct mtd_info *mtd, unsigned command, int column,int page_addr);
19  int(* waitfunc) (struct mtd_info *mtd, struct nand_chip *this);
20  int (* erase) (struct mtd_info *mtd, int page);
21  int (* scan_bbt) (struct mtd_info *mtd);
22  int (* errstat) (struct mtd_info *mtd, struct nand_chip *this, int state,int status, int page);
23  int (* write_page) (struct mtd_info *mtd, struct nand_chip *chip,uint32_t offset, int data_len, const uint8_t *buf,int oob_required, int page, int cached, int raw);
24  int (* onfi_set_features) (struct mtd_info *mtd, struct nand_chip *chip,int feature_addr, uint8_t *subfeature_para);
25  int (* onfi_get_features) (struct mtd_info *mtd, struct nand_chip *chip,int feature_addr, uint8_t *subfeature_para);
26  int (* setup_read_retry) (struct mtd_info *mtd, int retry_mode);
27  int chip_delay;
28  unsigned int options;
29  unsigned int bbt_options;
30  int page_shift;
31  int phys_erase_shift;
32  int bbt_erase_shift;
33  int chip_shift;
34  int numchips;
35  uint64_t chipsize;
36  int pagemask;
37  int pagebuf;
38  unsigned int pagebuf_bitflips;
39  int subpagesize;
40  uint8_t bits_per_cell;
41  uint16_t ecc_strength_ds;
42  uint16_t ecc_step_ds;
43  int onfi_timing_mode_default;
44  int badblockpos;
45  int badblockbits;
46  int onfi_version;
47  int jedec_version;
48  union {unnamed_union};
49  int read_retries;
50  flstate_t state;
51  uint8_t * oob_poi;
52  struct nand_hw_control * controller;
53  struct nand_ecc_ctrl ecc;
54  struct nand_buffers * buffers;
55  struct nand_hw_control hwcontrol;
56  uint8_t * bbt;
57  struct nand_bbt_descr * bbt_td;
58  struct nand_bbt_descr * bbt_md;
59  struct nand_bbt_descr * badblock_pattern;
60  void * priv;
61};  </pre></div><div class="refsect1"><a name="idp1102643580"></a><h2>Members</h2><div class="variablelist"><dl class="variablelist"><dt><span class="term">IO_ADDR_R</span></dt><dd><p>
62   [BOARDSPECIFIC] address to read the 8 I/O lines of the
63   flash device
64      </p></dd><dt><span class="term">IO_ADDR_W</span></dt><dd><p>
65   [BOARDSPECIFIC] address to write the 8 I/O lines of the
66   flash device.
67      </p></dd><dt><span class="term">read_byte</span></dt><dd><p>
68   [REPLACEABLE] read one byte from the chip
69      </p></dd><dt><span class="term">read_word</span></dt><dd><p>
70   [REPLACEABLE] read one word from the chip
71      </p></dd><dt><span class="term">write_byte</span></dt><dd><p>
72   [REPLACEABLE] write a single byte to the chip on the
73   low 8 I/O lines
74      </p></dd><dt><span class="term">write_buf</span></dt><dd><p>
75   [REPLACEABLE] write data from the buffer to the chip
76      </p></dd><dt><span class="term">read_buf</span></dt><dd><p>
77   [REPLACEABLE] read data from the chip into the buffer
78      </p></dd><dt><span class="term">select_chip</span></dt><dd><p>
79   [REPLACEABLE] select chip nr
80      </p></dd><dt><span class="term">block_bad</span></dt><dd><p>
81   [REPLACEABLE] check if a block is bad, using OOB markers
82      </p></dd><dt><span class="term">block_markbad</span></dt><dd><p>
83   [REPLACEABLE] mark a block bad
84      </p></dd><dt><span class="term">cmd_ctrl</span></dt><dd><p>
85   [BOARDSPECIFIC] hardwarespecific function for controlling
86   ALE/CLE/nCE. Also used to write command and address
87      </p></dd><dt><span class="term">init_size</span></dt><dd><p>
88   [BOARDSPECIFIC] hardwarespecific function for setting
89   mtd-&gt;oobsize, mtd-&gt;writesize and so on.
90   <em class="parameter"><code>id_data</code></em> contains the 8 bytes values of NAND_CMD_READID.
91   Return with the bus width.
92      </p></dd><dt><span class="term">dev_ready</span></dt><dd><p>
93   [BOARDSPECIFIC] hardwarespecific function for accessing
94   device ready/busy line. If set to NULL no access to
95   ready/busy is available and the ready/busy information
96   is read from the chip status register.
97      </p></dd><dt><span class="term">cmdfunc</span></dt><dd><p>
98   [REPLACEABLE] hardwarespecific function for writing
99   commands to the chip.
100      </p></dd><dt><span class="term">waitfunc</span></dt><dd><p>
101   [REPLACEABLE] hardwarespecific function for wait on
102   ready.
103      </p></dd><dt><span class="term">erase</span></dt><dd><p>
104   [REPLACEABLE] erase function
105      </p></dd><dt><span class="term">scan_bbt</span></dt><dd><p>
106   [REPLACEABLE] function to scan bad block table
107      </p></dd><dt><span class="term">errstat</span></dt><dd><p>
108   [OPTIONAL] hardware specific function to perform
109   additional error status checks (determine if errors are
110   correctable).
111      </p></dd><dt><span class="term">write_page</span></dt><dd><p>
112   [REPLACEABLE] High-level page write function
113      </p></dd><dt><span class="term">onfi_set_features</span></dt><dd><p>
114   [REPLACEABLE] set the features for ONFI nand
115      </p></dd><dt><span class="term">onfi_get_features</span></dt><dd><p>
116   [REPLACEABLE] get the features for ONFI nand
117      </p></dd><dt><span class="term">setup_read_retry</span></dt><dd><p>
118   [FLASHSPECIFIC] flash (vendor) specific function for
119   setting the read-retry mode. Mostly needed for MLC NAND.
120      </p></dd><dt><span class="term">chip_delay</span></dt><dd><p>
121   [BOARDSPECIFIC] chip dependent delay for transferring
122   data from array to read regs (tR).
123      </p></dd><dt><span class="term">options</span></dt><dd><p>
124   [BOARDSPECIFIC] various chip options. They can partly
125   be set to inform nand_scan about special functionality.
126   See the defines for further explanation.
127      </p></dd><dt><span class="term">bbt_options</span></dt><dd><p>
128   [INTERN] bad block specific options. All options used
129   here must come from bbm.h. By default, these options
130   will be copied to the appropriate nand_bbt_descr's.
131      </p></dd><dt><span class="term">page_shift</span></dt><dd><p>
132   [INTERN] number of address bits in a page (column
133   address bits).
134      </p></dd><dt><span class="term">phys_erase_shift</span></dt><dd><p>
135   [INTERN] number of address bits in a physical eraseblock
136      </p></dd><dt><span class="term">bbt_erase_shift</span></dt><dd><p>
137   [INTERN] number of address bits in a bbt entry
138      </p></dd><dt><span class="term">chip_shift</span></dt><dd><p>
139   [INTERN] number of address bits in one chip
140      </p></dd><dt><span class="term">numchips</span></dt><dd><p>
141   [INTERN] number of physical chips
142      </p></dd><dt><span class="term">chipsize</span></dt><dd><p>
143   [INTERN] the size of one chip for multichip arrays
144      </p></dd><dt><span class="term">pagemask</span></dt><dd><p>
145   [INTERN] page number mask = number of (pages / chip) - 1
146      </p></dd><dt><span class="term">pagebuf</span></dt><dd><p>
147   [INTERN] holds the pagenumber which is currently in
148   data_buf.
149      </p></dd><dt><span class="term">pagebuf_bitflips</span></dt><dd><p>
150   [INTERN] holds the bitflip count for the page which is
151   currently in data_buf.
152      </p></dd><dt><span class="term">subpagesize</span></dt><dd><p>
153   [INTERN] holds the subpagesize
154      </p></dd><dt><span class="term">bits_per_cell</span></dt><dd><p>
155   [INTERN] number of bits per cell. i.e., 1 means SLC.
156      </p></dd><dt><span class="term">ecc_strength_ds</span></dt><dd><p>
157   [INTERN] ECC correctability from the datasheet.
158   Minimum amount of bit errors per <em class="parameter"><code>ecc_step_ds</code></em> guaranteed
159   to be correctable. If unknown, set to zero.
160      </p></dd><dt><span class="term">ecc_step_ds</span></dt><dd><p>
161   [INTERN] ECC step required by the <em class="parameter"><code>ecc_strength_ds</code></em>,
162   also from the datasheet. It is the recommended ECC step
163   size, if known; if unknown, set to zero.
164      </p></dd><dt><span class="term">onfi_timing_mode_default</span></dt><dd><p>
165   [INTERN] default ONFI timing mode. This field is
166   either deduced from the datasheet if the NAND
167   chip is not ONFI compliant or set to 0 if it is
168   (an ONFI chip is always configured in mode 0
169   after a NAND reset)
170      </p></dd><dt><span class="term">badblockpos</span></dt><dd><p>
171   [INTERN] position of the bad block marker in the oob
172   area.
173      </p></dd><dt><span class="term">badblockbits</span></dt><dd><p>
174   [INTERN] minimum number of set bits in a good block's
175   bad block marker position; i.e., BBM == 11110111b is
176   not bad when badblockbits == 7
177      </p></dd><dt><span class="term">onfi_version</span></dt><dd><p>
178   [INTERN] holds the chip ONFI version (BCD encoded),
179   non 0 if ONFI supported.
180      </p></dd><dt><span class="term">jedec_version</span></dt><dd><p>
181   [INTERN] holds the chip JEDEC version (BCD encoded),
182   non 0 if JEDEC supported.
183      </p></dd><dt><span class="term">{unnamed_union}</span></dt><dd><p>
184   anonymous
185      </p></dd><dt><span class="term">read_retries</span></dt><dd><p>
186   [INTERN] the number of read retry modes supported
187      </p></dd><dt><span class="term">state</span></dt><dd><p>
188   [INTERN] the current state of the NAND device
189      </p></dd><dt><span class="term">oob_poi</span></dt><dd><p>
190   "poison value buffer," used for laying out OOB data
191   before writing
192      </p></dd><dt><span class="term">controller</span></dt><dd><p>
193   [REPLACEABLE] a pointer to a hardware controller
194   structure which is shared among multiple independent
195   devices.
196      </p></dd><dt><span class="term">ecc</span></dt><dd><p>
197   [BOARDSPECIFIC] ECC control structure
198      </p></dd><dt><span class="term">buffers</span></dt><dd><p>
199   buffer structure for read/write
200      </p></dd><dt><span class="term">hwcontrol</span></dt><dd><p>
201   platform-specific hardware control structure
202      </p></dd><dt><span class="term">bbt</span></dt><dd><p>
203   [INTERN] bad block table pointer
204      </p></dd><dt><span class="term">bbt_td</span></dt><dd><p>
205   [REPLACEABLE] bad block table descriptor for flash
206   lookup.
207      </p></dd><dt><span class="term">bbt_md</span></dt><dd><p>
208   [REPLACEABLE] bad block table mirror descriptor
209      </p></dd><dt><span class="term">badblock_pattern</span></dt><dd><p>
210   [REPLACEABLE] bad block scan pattern used for initial
211   bad block scan.
212      </p></dd><dt><span class="term">priv</span></dt><dd><p>
213   [OPTIONAL] pointer to private chip data
214      </p></dd></dl></div></div></div><div class="navfooter"><hr><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="API-struct-nand-buffers.html">Prev</a>&#160;</td><td width="20%" align="center"><a accesskey="u" href="structs.html">Up</a></td><td width="40%" align="right">&#160;<a accesskey="n" href="API-struct-nand-flash-dev.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top"><span class="phrase">struct nand_buffers</span>&#160;</td><td width="20%" align="center"><a accesskey="h" href="index.html">Home</a></td><td width="40%" align="right" valign="top">&#160;<span class="phrase">struct nand_flash_dev</span></td></tr></table></div></body></html>
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