1<html><head><meta http-equiv="Content-Type" content="text/html; charset=ANSI_X3.4-1968"><title>PCI Support Library</title><meta name="generator" content="DocBook XSL Stylesheets V1.78.1"><link rel="home" href="index.html" title="The Linux Kernel API"><link rel="up" href="hardware.html" title="Chapter&#160;9.&#160;Hardware Interfaces"><link rel="prev" href="API-arch-phys-wc-add.html" title="arch_phys_wc_add"><link rel="next" href="API-pci-bus-max-busnr.html" title="pci_bus_max_busnr"></head><body bgcolor="white" text="black" link="#0000FF" vlink="#840084" alink="#0000FF"><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">PCI Support Library</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="API-arch-phys-wc-add.html">Prev</a>&#160;</td><th width="60%" align="center">Chapter&#160;9.&#160;Hardware Interfaces</th><td width="20%" align="right">&#160;<a accesskey="n" href="API-pci-bus-max-busnr.html">Next</a></td></tr></table><hr></div><div class="sect1"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a name="idp1126056388"></a>PCI Support Library</h2></div></div></div><div class="toc"><dl class="toc"><dt><span class="refentrytitle"><a href="API-pci-bus-max-busnr.html"><span class="phrase">pci_bus_max_busnr</span></a></span><span class="refpurpose"> &#8212; 
2  returns maximum PCI bus number of given bus' children
3 </span></dt><dt><span class="refentrytitle"><a href="API-pci-find-capability.html"><span class="phrase">pci_find_capability</span></a></span><span class="refpurpose"> &#8212; 
4     query for devices' capabilities
5 </span></dt><dt><span class="refentrytitle"><a href="API-pci-bus-find-capability.html"><span class="phrase">pci_bus_find_capability</span></a></span><span class="refpurpose"> &#8212; 
6     query for devices' capabilities
7 </span></dt><dt><span class="refentrytitle"><a href="API-pci-find-next-ext-capability.html"><span class="phrase">pci_find_next_ext_capability</span></a></span><span class="refpurpose"> &#8212; 
8     Find an extended capability
9 </span></dt><dt><span class="refentrytitle"><a href="API-pci-find-ext-capability.html"><span class="phrase">pci_find_ext_capability</span></a></span><span class="refpurpose"> &#8212; 
10     Find an extended capability
11 </span></dt><dt><span class="refentrytitle"><a href="API-pci-find-next-ht-capability.html"><span class="phrase">pci_find_next_ht_capability</span></a></span><span class="refpurpose"> &#8212; 
12     query a device's Hypertransport capabilities
13 </span></dt><dt><span class="refentrytitle"><a href="API-pci-find-ht-capability.html"><span class="phrase">pci_find_ht_capability</span></a></span><span class="refpurpose"> &#8212; 
14     query a device's Hypertransport capabilities
15 </span></dt><dt><span class="refentrytitle"><a href="API-pci-find-parent-resource.html"><span class="phrase">pci_find_parent_resource</span></a></span><span class="refpurpose"> &#8212; 
16     return resource region of parent bus of given region
17 </span></dt><dt><span class="refentrytitle"><a href="API---pci-complete-power-transition.html"><span class="phrase">__pci_complete_power_transition</span></a></span><span class="refpurpose"> &#8212; 
18     Complete power transition of a PCI device
19 </span></dt><dt><span class="refentrytitle"><a href="API-pci-set-power-state.html"><span class="phrase">pci_set_power_state</span></a></span><span class="refpurpose"> &#8212; 
20     Set the power state of a PCI device
21 </span></dt><dt><span class="refentrytitle"><a href="API-pci-choose-state.html"><span class="phrase">pci_choose_state</span></a></span><span class="refpurpose"> &#8212; 
22     Choose the power state of a PCI device
23 </span></dt><dt><span class="refentrytitle"><a href="API-pci-save-state.html"><span class="phrase">pci_save_state</span></a></span><span class="refpurpose"> &#8212; 
24     save the PCI configuration space of a device before suspending
25 </span></dt><dt><span class="refentrytitle"><a href="API-pci-restore-state.html"><span class="phrase">pci_restore_state</span></a></span><span class="refpurpose"> &#8212; 
26     Restore the saved state of a PCI device
27 </span></dt><dt><span class="refentrytitle"><a href="API-pci-store-saved-state.html"><span class="phrase">pci_store_saved_state</span></a></span><span class="refpurpose"> &#8212; 
28     Allocate and return an opaque struct containing the device saved state.
29 </span></dt><dt><span class="refentrytitle"><a href="API-pci-load-saved-state.html"><span class="phrase">pci_load_saved_state</span></a></span><span class="refpurpose"> &#8212; 
30     Reload the provided save state into struct pci_dev.
31 </span></dt><dt><span class="refentrytitle"><a href="API-pci-load-and-free-saved-state.html"><span class="phrase">pci_load_and_free_saved_state</span></a></span><span class="refpurpose"> &#8212; 
32     Reload the save state pointed to by state, and free the memory allocated for it.
33 </span></dt><dt><span class="refentrytitle"><a href="API-pci-reenable-device.html"><span class="phrase">pci_reenable_device</span></a></span><span class="refpurpose"> &#8212; 
34     Resume abandoned device
35 </span></dt><dt><span class="refentrytitle"><a href="API-pci-enable-device-io.html"><span class="phrase">pci_enable_device_io</span></a></span><span class="refpurpose"> &#8212; 
36     Initialize a device for use with IO space
37 </span></dt><dt><span class="refentrytitle"><a href="API-pci-enable-device-mem.html"><span class="phrase">pci_enable_device_mem</span></a></span><span class="refpurpose"> &#8212; 
38     Initialize a device for use with Memory space
39 </span></dt><dt><span class="refentrytitle"><a href="API-pci-enable-device.html"><span class="phrase">pci_enable_device</span></a></span><span class="refpurpose"> &#8212; 
40     Initialize device before it's used by a driver.
41 </span></dt><dt><span class="refentrytitle"><a href="API-pcim-enable-device.html"><span class="phrase">pcim_enable_device</span></a></span><span class="refpurpose"> &#8212; 
42     Managed <code class="function">pci_enable_device</code>
43 </span></dt><dt><span class="refentrytitle"><a href="API-pcim-pin-device.html"><span class="phrase">pcim_pin_device</span></a></span><span class="refpurpose"> &#8212; 
44     Pin managed PCI device
45 </span></dt><dt><span class="refentrytitle"><a href="API-pci-disable-device.html"><span class="phrase">pci_disable_device</span></a></span><span class="refpurpose"> &#8212; 
46     Disable PCI device after use
47 </span></dt><dt><span class="refentrytitle"><a href="API-pci-set-pcie-reset-state.html"><span class="phrase">pci_set_pcie_reset_state</span></a></span><span class="refpurpose"> &#8212; 
48     set reset state for device dev
49 </span></dt><dt><span class="refentrytitle"><a href="API-pci-pme-capable.html"><span class="phrase">pci_pme_capable</span></a></span><span class="refpurpose"> &#8212; 
50     check the capability of PCI device to generate PME#
51 </span></dt><dt><span class="refentrytitle"><a href="API-pci-pme-active.html"><span class="phrase">pci_pme_active</span></a></span><span class="refpurpose"> &#8212; 
52     enable or disable PCI device's PME# function
53 </span></dt><dt><span class="refentrytitle"><a href="API---pci-enable-wake.html"><span class="phrase">__pci_enable_wake</span></a></span><span class="refpurpose"> &#8212; 
54     enable PCI device as wakeup event source
55 </span></dt><dt><span class="refentrytitle"><a href="API-pci-wake-from-d3.html"><span class="phrase">pci_wake_from_d3</span></a></span><span class="refpurpose"> &#8212; 
56     enable/disable device to wake up from D3_hot or D3_cold
57 </span></dt><dt><span class="refentrytitle"><a href="API-pci-prepare-to-sleep.html"><span class="phrase">pci_prepare_to_sleep</span></a></span><span class="refpurpose"> &#8212; 
58     prepare PCI device for system-wide transition into a sleep state
59 </span></dt><dt><span class="refentrytitle"><a href="API-pci-back-from-sleep.html"><span class="phrase">pci_back_from_sleep</span></a></span><span class="refpurpose"> &#8212; 
60     turn PCI device on during system-wide transition into working state
61 </span></dt><dt><span class="refentrytitle"><a href="API-pci-dev-run-wake.html"><span class="phrase">pci_dev_run_wake</span></a></span><span class="refpurpose"> &#8212; 
62     Check if device can generate run-time wake-up events.
63 </span></dt><dt><span class="refentrytitle"><a href="API-pci-common-swizzle.html"><span class="phrase">pci_common_swizzle</span></a></span><span class="refpurpose"> &#8212; 
64     swizzle INTx all the way to root bridge
65 </span></dt><dt><span class="refentrytitle"><a href="API-pci-release-region.html"><span class="phrase">pci_release_region</span></a></span><span class="refpurpose"> &#8212; 
66     Release a PCI bar
67 </span></dt><dt><span class="refentrytitle"><a href="API-pci-request-region.html"><span class="phrase">pci_request_region</span></a></span><span class="refpurpose"> &#8212; 
68     Reserve PCI I/O and memory resource
69 </span></dt><dt><span class="refentrytitle"><a href="API-pci-request-region-exclusive.html"><span class="phrase">pci_request_region_exclusive</span></a></span><span class="refpurpose"> &#8212; 
70     Reserved PCI I/O and memory resource
71 </span></dt><dt><span class="refentrytitle"><a href="API-pci-release-selected-regions.html"><span class="phrase">pci_release_selected_regions</span></a></span><span class="refpurpose"> &#8212; 
72     Release selected PCI I/O and memory resources
73 </span></dt><dt><span class="refentrytitle"><a href="API-pci-request-selected-regions.html"><span class="phrase">pci_request_selected_regions</span></a></span><span class="refpurpose"> &#8212; 
74     Reserve selected PCI I/O and memory resources
75 </span></dt><dt><span class="refentrytitle"><a href="API-pci-release-regions.html"><span class="phrase">pci_release_regions</span></a></span><span class="refpurpose"> &#8212; 
76     Release reserved PCI I/O and memory resources
77 </span></dt><dt><span class="refentrytitle"><a href="API-pci-request-regions.html"><span class="phrase">pci_request_regions</span></a></span><span class="refpurpose"> &#8212; 
78     Reserved PCI I/O and memory resources
79 </span></dt><dt><span class="refentrytitle"><a href="API-pci-request-regions-exclusive.html"><span class="phrase">pci_request_regions_exclusive</span></a></span><span class="refpurpose"> &#8212; 
80     Reserved PCI I/O and memory resources
81 </span></dt><dt><span class="refentrytitle"><a href="API-pci-set-master.html"><span class="phrase">pci_set_master</span></a></span><span class="refpurpose"> &#8212; 
82     enables bus-mastering for device dev
83 </span></dt><dt><span class="refentrytitle"><a href="API-pci-clear-master.html"><span class="phrase">pci_clear_master</span></a></span><span class="refpurpose"> &#8212; 
84     disables bus-mastering for device dev
85 </span></dt><dt><span class="refentrytitle"><a href="API-pci-set-cacheline-size.html"><span class="phrase">pci_set_cacheline_size</span></a></span><span class="refpurpose"> &#8212; 
86     ensure the CACHE_LINE_SIZE register is programmed
87 </span></dt><dt><span class="refentrytitle"><a href="API-pci-set-mwi.html"><span class="phrase">pci_set_mwi</span></a></span><span class="refpurpose"> &#8212; 
88     enables memory-write-invalidate PCI transaction
89 </span></dt><dt><span class="refentrytitle"><a href="API-pci-try-set-mwi.html"><span class="phrase">pci_try_set_mwi</span></a></span><span class="refpurpose"> &#8212; 
90     enables memory-write-invalidate PCI transaction
91 </span></dt><dt><span class="refentrytitle"><a href="API-pci-clear-mwi.html"><span class="phrase">pci_clear_mwi</span></a></span><span class="refpurpose"> &#8212; 
92     disables Memory-Write-Invalidate for device dev
93 </span></dt><dt><span class="refentrytitle"><a href="API-pci-intx.html"><span class="phrase">pci_intx</span></a></span><span class="refpurpose"> &#8212; 
94     enables/disables PCI INTx for device dev
95 </span></dt><dt><span class="refentrytitle"><a href="API-pci-intx-mask-supported.html"><span class="phrase">pci_intx_mask_supported</span></a></span><span class="refpurpose"> &#8212; 
96     probe for INTx masking support
97 </span></dt><dt><span class="refentrytitle"><a href="API-pci-check-and-mask-intx.html"><span class="phrase">pci_check_and_mask_intx</span></a></span><span class="refpurpose"> &#8212; 
98     mask INTx on pending interrupt
99 </span></dt><dt><span class="refentrytitle"><a href="API-pci-check-and-unmask-intx.html"><span class="phrase">pci_check_and_unmask_intx</span></a></span><span class="refpurpose"> &#8212; 
100     unmask INTx if no interrupt is pending
101 </span></dt><dt><span class="refentrytitle"><a href="API-pci-msi-off.html"><span class="phrase">pci_msi_off</span></a></span><span class="refpurpose"> &#8212; 
102     disables any MSI or MSI-X capabilities
103 </span></dt><dt><span class="refentrytitle"><a href="API-pci-wait-for-pending-transaction.html"><span class="phrase">pci_wait_for_pending_transaction</span></a></span><span class="refpurpose"> &#8212; 
104     waits for pending transaction
105 </span></dt><dt><span class="refentrytitle"><a href="API-pci-reset-bridge-secondary-bus.html"><span class="phrase">pci_reset_bridge_secondary_bus</span></a></span><span class="refpurpose"> &#8212; 
106     Reset the secondary bus on a PCI bridge.
107 </span></dt><dt><span class="refentrytitle"><a href="API---pci-reset-function.html"><span class="phrase">__pci_reset_function</span></a></span><span class="refpurpose"> &#8212; 
108     reset a PCI device function
109 </span></dt><dt><span class="refentrytitle"><a href="API---pci-reset-function-locked.html"><span class="phrase">__pci_reset_function_locked</span></a></span><span class="refpurpose"> &#8212; 
110     reset a PCI device function while holding the <em class="parameter"><code>dev</code></em> mutex lock.
111 </span></dt><dt><span class="refentrytitle"><a href="API-pci-reset-function.html"><span class="phrase">pci_reset_function</span></a></span><span class="refpurpose"> &#8212; 
112     quiesce and reset a PCI device function
113 </span></dt><dt><span class="refentrytitle"><a href="API-pci-try-reset-function.html"><span class="phrase">pci_try_reset_function</span></a></span><span class="refpurpose"> &#8212; 
114     quiesce and reset a PCI device function
115 </span></dt><dt><span class="refentrytitle"><a href="API-pci-probe-reset-slot.html"><span class="phrase">pci_probe_reset_slot</span></a></span><span class="refpurpose"> &#8212; 
116     probe whether a PCI slot can be reset
117 </span></dt><dt><span class="refentrytitle"><a href="API-pci-reset-slot.html"><span class="phrase">pci_reset_slot</span></a></span><span class="refpurpose"> &#8212; 
118     reset a PCI slot
119 </span></dt><dt><span class="refentrytitle"><a href="API-pci-try-reset-slot.html"><span class="phrase">pci_try_reset_slot</span></a></span><span class="refpurpose"> &#8212; 
120     Try to reset a PCI slot
121 </span></dt><dt><span class="refentrytitle"><a href="API-pci-probe-reset-bus.html"><span class="phrase">pci_probe_reset_bus</span></a></span><span class="refpurpose"> &#8212; 
122     probe whether a PCI bus can be reset
123 </span></dt><dt><span class="refentrytitle"><a href="API-pci-reset-bus.html"><span class="phrase">pci_reset_bus</span></a></span><span class="refpurpose"> &#8212; 
124     reset a PCI bus
125 </span></dt><dt><span class="refentrytitle"><a href="API-pci-try-reset-bus.html"><span class="phrase">pci_try_reset_bus</span></a></span><span class="refpurpose"> &#8212; 
126     Try to reset a PCI bus
127 </span></dt><dt><span class="refentrytitle"><a href="API-pcix-get-max-mmrbc.html"><span class="phrase">pcix_get_max_mmrbc</span></a></span><span class="refpurpose"> &#8212; 
128     get PCI-X maximum designed memory read byte count
129 </span></dt><dt><span class="refentrytitle"><a href="API-pcix-get-mmrbc.html"><span class="phrase">pcix_get_mmrbc</span></a></span><span class="refpurpose"> &#8212; 
130     get PCI-X maximum memory read byte count
131 </span></dt><dt><span class="refentrytitle"><a href="API-pcix-set-mmrbc.html"><span class="phrase">pcix_set_mmrbc</span></a></span><span class="refpurpose"> &#8212; 
132     set PCI-X maximum memory read byte count
133 </span></dt><dt><span class="refentrytitle"><a href="API-pcie-get-readrq.html"><span class="phrase">pcie_get_readrq</span></a></span><span class="refpurpose"> &#8212; 
134     get PCI Express read request size
135 </span></dt><dt><span class="refentrytitle"><a href="API-pcie-set-readrq.html"><span class="phrase">pcie_set_readrq</span></a></span><span class="refpurpose"> &#8212; 
136     set PCI Express maximum memory read request
137 </span></dt><dt><span class="refentrytitle"><a href="API-pcie-get-mps.html"><span class="phrase">pcie_get_mps</span></a></span><span class="refpurpose"> &#8212; 
138     get PCI Express maximum payload size
139 </span></dt><dt><span class="refentrytitle"><a href="API-pcie-set-mps.html"><span class="phrase">pcie_set_mps</span></a></span><span class="refpurpose"> &#8212; 
140     set PCI Express maximum payload size
141 </span></dt><dt><span class="refentrytitle"><a href="API-pcie-get-minimum-link.html"><span class="phrase">pcie_get_minimum_link</span></a></span><span class="refpurpose"> &#8212; 
142     determine minimum link settings of a PCI device
143 </span></dt><dt><span class="refentrytitle"><a href="API-pci-select-bars.html"><span class="phrase">pci_select_bars</span></a></span><span class="refpurpose"> &#8212; 
144     Make BAR mask from the type of resource
145 </span></dt><dt><span class="refentrytitle"><a href="API-pci-add-dynid.html"><span class="phrase">pci_add_dynid</span></a></span><span class="refpurpose"> &#8212; 
146  add a new PCI device ID to this driver and re-probe devices
147 </span></dt><dt><span class="refentrytitle"><a href="API-pci-match-id.html"><span class="phrase">pci_match_id</span></a></span><span class="refpurpose"> &#8212; 
148     See if a pci device matches a given pci_id table
149 </span></dt><dt><span class="refentrytitle"><a href="API---pci-register-driver.html"><span class="phrase">__pci_register_driver</span></a></span><span class="refpurpose"> &#8212; 
150     register a new pci driver
151 </span></dt><dt><span class="refentrytitle"><a href="API-pci-unregister-driver.html"><span class="phrase">pci_unregister_driver</span></a></span><span class="refpurpose"> &#8212; 
152     unregister a pci driver
153 </span></dt><dt><span class="refentrytitle"><a href="API-pci-dev-driver.html"><span class="phrase">pci_dev_driver</span></a></span><span class="refpurpose"> &#8212; 
154     get the pci_driver of a device
155 </span></dt><dt><span class="refentrytitle"><a href="API-pci-dev-get.html"><span class="phrase">pci_dev_get</span></a></span><span class="refpurpose"> &#8212; 
156     increments the reference count of the pci device structure
157 </span></dt><dt><span class="refentrytitle"><a href="API-pci-dev-put.html"><span class="phrase">pci_dev_put</span></a></span><span class="refpurpose"> &#8212; 
158     release a use of the pci device structure
159 </span></dt><dt><span class="refentrytitle"><a href="API-pci-stop-and-remove-bus-device.html"><span class="phrase">pci_stop_and_remove_bus_device</span></a></span><span class="refpurpose"> &#8212; 
160  remove a PCI device and any children
161 </span></dt><dt><span class="refentrytitle"><a href="API-pci-find-bus.html"><span class="phrase">pci_find_bus</span></a></span><span class="refpurpose"> &#8212; 
162  locate PCI bus from a given domain and bus number
163 </span></dt><dt><span class="refentrytitle"><a href="API-pci-find-next-bus.html"><span class="phrase">pci_find_next_bus</span></a></span><span class="refpurpose"> &#8212; 
164     begin or continue searching for a PCI bus
165 </span></dt><dt><span class="refentrytitle"><a href="API-pci-get-slot.html"><span class="phrase">pci_get_slot</span></a></span><span class="refpurpose"> &#8212; 
166     locate PCI device for a given PCI slot
167 </span></dt><dt><span class="refentrytitle"><a href="API-pci-get-domain-bus-and-slot.html"><span class="phrase">pci_get_domain_bus_and_slot</span></a></span><span class="refpurpose"> &#8212; 
168     locate PCI device for a given PCI domain (segment), bus, and slot
169 </span></dt><dt><span class="refentrytitle"><a href="API-pci-get-subsys.html"><span class="phrase">pci_get_subsys</span></a></span><span class="refpurpose"> &#8212; 
170     begin or continue searching for a PCI device by vendor/subvendor/device/subdevice id
171 </span></dt><dt><span class="refentrytitle"><a href="API-pci-get-device.html"><span class="phrase">pci_get_device</span></a></span><span class="refpurpose"> &#8212; 
172     begin or continue searching for a PCI device by vendor/device id
173 </span></dt><dt><span class="refentrytitle"><a href="API-pci-get-class.html"><span class="phrase">pci_get_class</span></a></span><span class="refpurpose"> &#8212; 
174     begin or continue searching for a PCI device by class
175 </span></dt><dt><span class="refentrytitle"><a href="API-pci-dev-present.html"><span class="phrase">pci_dev_present</span></a></span><span class="refpurpose"> &#8212; 
176     Returns 1 if device matching the device list is present, 0 if not.
177 </span></dt><dt><span class="refentrytitle"><a href="API-pci-msi-vec-count.html"><span class="phrase">pci_msi_vec_count</span></a></span><span class="refpurpose"> &#8212; 
178  Return the number of MSI vectors a device can send
179 </span></dt><dt><span class="refentrytitle"><a href="API-pci-msix-vec-count.html"><span class="phrase">pci_msix_vec_count</span></a></span><span class="refpurpose"> &#8212; 
180     return the number of device's MSI-X table entries
181 </span></dt><dt><span class="refentrytitle"><a href="API-pci-enable-msix.html"><span class="phrase">pci_enable_msix</span></a></span><span class="refpurpose"> &#8212; 
182     configure device's MSI-X capability structure
183 </span></dt><dt><span class="refentrytitle"><a href="API-pci-msi-enabled.html"><span class="phrase">pci_msi_enabled</span></a></span><span class="refpurpose"> &#8212; 
184     is MSI enabled?
185 </span></dt><dt><span class="refentrytitle"><a href="API-pci-enable-msi-range.html"><span class="phrase">pci_enable_msi_range</span></a></span><span class="refpurpose"> &#8212; 
186     configure device's MSI capability structure
187 </span></dt><dt><span class="refentrytitle"><a href="API-pci-enable-msix-range.html"><span class="phrase">pci_enable_msix_range</span></a></span><span class="refpurpose"> &#8212; 
188     configure device's MSI-X capability structure
189 </span></dt><dt><span class="refentrytitle"><a href="API-pci-bus-alloc-resource.html"><span class="phrase">pci_bus_alloc_resource</span></a></span><span class="refpurpose"> &#8212; 
190  allocate a resource from a parent bus
191 </span></dt><dt><span class="refentrytitle"><a href="API-pci-bus-add-device.html"><span class="phrase">pci_bus_add_device</span></a></span><span class="refpurpose"> &#8212; 
192     start driver for a single device
193 </span></dt><dt><span class="refentrytitle"><a href="API-pci-bus-add-devices.html"><span class="phrase">pci_bus_add_devices</span></a></span><span class="refpurpose"> &#8212; 
194     start driver for PCI devices
195 </span></dt><dt><span class="refentrytitle"><a href="API-pci-bus-set-ops.html"><span class="phrase">pci_bus_set_ops</span></a></span><span class="refpurpose"> &#8212; 
196  Set raw operations of pci bus
197 </span></dt><dt><span class="refentrytitle"><a href="API-pci-read-vpd.html"><span class="phrase">pci_read_vpd</span></a></span><span class="refpurpose"> &#8212; 
198     Read one entry from Vital Product Data
199 </span></dt><dt><span class="refentrytitle"><a href="API-pci-write-vpd.html"><span class="phrase">pci_write_vpd</span></a></span><span class="refpurpose"> &#8212; 
200     Write entry to Vital Product Data
201 </span></dt><dt><span class="refentrytitle"><a href="API-pci-cfg-access-lock.html"><span class="phrase">pci_cfg_access_lock</span></a></span><span class="refpurpose"> &#8212; 
202     Lock PCI config reads/writes
203 </span></dt><dt><span class="refentrytitle"><a href="API-pci-cfg-access-trylock.html"><span class="phrase">pci_cfg_access_trylock</span></a></span><span class="refpurpose"> &#8212; 
204     try to lock PCI config reads/writes
205 </span></dt><dt><span class="refentrytitle"><a href="API-pci-cfg-access-unlock.html"><span class="phrase">pci_cfg_access_unlock</span></a></span><span class="refpurpose"> &#8212; 
206     Unlock PCI config reads/writes
207 </span></dt><dt><span class="refentrytitle"><a href="API-pci-lost-interrupt.html"><span class="phrase">pci_lost_interrupt</span></a></span><span class="refpurpose"> &#8212; 
208  reports a lost PCI interrupt
209 </span></dt><dt><span class="refentrytitle"><a href="API---ht-create-irq.html"><span class="phrase">__ht_create_irq</span></a></span><span class="refpurpose"> &#8212; 
210  create an irq and attach it to a device.
211 </span></dt><dt><span class="refentrytitle"><a href="API-ht-create-irq.html"><span class="phrase">ht_create_irq</span></a></span><span class="refpurpose"> &#8212; 
212     create an irq and attach it to a device.
213 </span></dt><dt><span class="refentrytitle"><a href="API-ht-destroy-irq.html"><span class="phrase">ht_destroy_irq</span></a></span><span class="refpurpose"> &#8212; 
214     destroy an irq created with ht_create_irq
215 </span></dt><dt><span class="refentrytitle"><a href="API-pci-scan-slot.html"><span class="phrase">pci_scan_slot</span></a></span><span class="refpurpose"> &#8212; 
216  scan a PCI slot on a bus for devices.
217 </span></dt><dt><span class="refentrytitle"><a href="API-pci-rescan-bus.html"><span class="phrase">pci_rescan_bus</span></a></span><span class="refpurpose"> &#8212; 
218     scan a PCI bus for devices.
219 </span></dt><dt><span class="refentrytitle"><a href="API-pci-create-slot.html"><span class="phrase">pci_create_slot</span></a></span><span class="refpurpose"> &#8212; 
220  create or increment refcount for physical PCI slot
221 </span></dt><dt><span class="refentrytitle"><a href="API-pci-destroy-slot.html"><span class="phrase">pci_destroy_slot</span></a></span><span class="refpurpose"> &#8212; 
222     decrement refcount for physical PCI slot
223 </span></dt><dt><span class="refentrytitle"><a href="API-pci-hp-create-module-link.html"><span class="phrase">pci_hp_create_module_link</span></a></span><span class="refpurpose"> &#8212; 
224     create symbolic link to the hotplug driver module.
225 </span></dt><dt><span class="refentrytitle"><a href="API-pci-hp-remove-module-link.html"><span class="phrase">pci_hp_remove_module_link</span></a></span><span class="refpurpose"> &#8212; 
226     remove symbolic link to the hotplug driver module.
227 </span></dt><dt><span class="refentrytitle"><a href="API-pci-enable-rom.html"><span class="phrase">pci_enable_rom</span></a></span><span class="refpurpose"> &#8212; 
228  enable ROM decoding for a PCI device
229 </span></dt><dt><span class="refentrytitle"><a href="API-pci-disable-rom.html"><span class="phrase">pci_disable_rom</span></a></span><span class="refpurpose"> &#8212; 
230     disable ROM decoding for a PCI device
231 </span></dt><dt><span class="refentrytitle"><a href="API-pci-map-rom.html"><span class="phrase">pci_map_rom</span></a></span><span class="refpurpose"> &#8212; 
232     map a PCI ROM to kernel space
233 </span></dt><dt><span class="refentrytitle"><a href="API-pci-unmap-rom.html"><span class="phrase">pci_unmap_rom</span></a></span><span class="refpurpose"> &#8212; 
234     unmap the ROM from kernel space
235 </span></dt><dt><span class="refentrytitle"><a href="API-pci-platform-rom.html"><span class="phrase">pci_platform_rom</span></a></span><span class="refpurpose"> &#8212; 
236     provides a pointer to any ROM image provided by the platform
237 </span></dt><dt><span class="refentrytitle"><a href="API-pci-enable-sriov.html"><span class="phrase">pci_enable_sriov</span></a></span><span class="refpurpose"> &#8212; 
238  enable the SR-IOV capability
239 </span></dt><dt><span class="refentrytitle"><a href="API-pci-disable-sriov.html"><span class="phrase">pci_disable_sriov</span></a></span><span class="refpurpose"> &#8212; 
240     disable the SR-IOV capability
241 </span></dt><dt><span class="refentrytitle"><a href="API-pci-num-vf.html"><span class="phrase">pci_num_vf</span></a></span><span class="refpurpose"> &#8212; 
242     return number of VFs associated with a PF device_release_driver
243 </span></dt><dt><span class="refentrytitle"><a href="API-pci-vfs-assigned.html"><span class="phrase">pci_vfs_assigned</span></a></span><span class="refpurpose"> &#8212; 
244     returns number of VFs are assigned to a guest
245 </span></dt><dt><span class="refentrytitle"><a href="API-pci-sriov-set-totalvfs.html"><span class="phrase">pci_sriov_set_totalvfs</span></a></span><span class="refpurpose"> &#8212; 
246     - reduce the TotalVFs available
247 </span></dt><dt><span class="refentrytitle"><a href="API-pci-sriov-get-totalvfs.html"><span class="phrase">pci_sriov_get_totalvfs</span></a></span><span class="refpurpose"> &#8212; 
248     - get total VFs supported on this device
249 </span></dt><dt><span class="refentrytitle"><a href="API-pci-read-legacy-io.html"><span class="phrase">pci_read_legacy_io</span></a></span><span class="refpurpose"> &#8212; 
250  read byte(s) from legacy I/O port space
251 </span></dt><dt><span class="refentrytitle"><a href="API-pci-write-legacy-io.html"><span class="phrase">pci_write_legacy_io</span></a></span><span class="refpurpose"> &#8212; 
252     write byte(s) to legacy I/O port space
253 </span></dt><dt><span class="refentrytitle"><a href="API-pci-mmap-legacy-mem.html"><span class="phrase">pci_mmap_legacy_mem</span></a></span><span class="refpurpose"> &#8212; 
254     map legacy PCI memory into user memory space
255 </span></dt><dt><span class="refentrytitle"><a href="API-pci-mmap-legacy-io.html"><span class="phrase">pci_mmap_legacy_io</span></a></span><span class="refpurpose"> &#8212; 
256     map legacy PCI IO into user memory space
257 </span></dt><dt><span class="refentrytitle"><a href="API-pci-adjust-legacy-attr.html"><span class="phrase">pci_adjust_legacy_attr</span></a></span><span class="refpurpose"> &#8212; 
258     adjustment of legacy file attributes
259 </span></dt><dt><span class="refentrytitle"><a href="API-pci-create-legacy-files.html"><span class="phrase">pci_create_legacy_files</span></a></span><span class="refpurpose"> &#8212; 
260     create legacy I/O port and memory files
261 </span></dt><dt><span class="refentrytitle"><a href="API-pci-mmap-resource.html"><span class="phrase">pci_mmap_resource</span></a></span><span class="refpurpose"> &#8212; 
262     map a PCI resource into user memory space
263 </span></dt><dt><span class="refentrytitle"><a href="API-pci-remove-resource-files.html"><span class="phrase">pci_remove_resource_files</span></a></span><span class="refpurpose"> &#8212; 
264     cleanup resource files
265 </span></dt><dt><span class="refentrytitle"><a href="API-pci-create-resource-files.html"><span class="phrase">pci_create_resource_files</span></a></span><span class="refpurpose"> &#8212; 
266     create resource files in sysfs for <em class="parameter"><code>dev</code></em>
267 </span></dt><dt><span class="refentrytitle"><a href="API-pci-write-rom.html"><span class="phrase">pci_write_rom</span></a></span><span class="refpurpose"> &#8212; 
268     used to enable access to the PCI ROM display
269 </span></dt><dt><span class="refentrytitle"><a href="API-pci-read-rom.html"><span class="phrase">pci_read_rom</span></a></span><span class="refpurpose"> &#8212; 
270     read a PCI ROM
271 </span></dt><dt><span class="refentrytitle"><a href="API-pci-remove-sysfs-dev-files.html"><span class="phrase">pci_remove_sysfs_dev_files</span></a></span><span class="refpurpose"> &#8212; 
272     cleanup PCI specific sysfs files
273 </span></dt></dl></div></div><div class="navfooter"><hr><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="API-arch-phys-wc-add.html">Prev</a>&#160;</td><td width="20%" align="center"><a accesskey="u" href="hardware.html">Up</a></td><td width="40%" align="right">&#160;<a accesskey="n" href="API-pci-bus-max-busnr.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top"><span class="phrase">arch_phys_wc_add</span>&#160;</td><td width="20%" align="center"><a accesskey="h" href="index.html">Home</a></td><td width="40%" align="right" valign="top">&#160;<span class="phrase">pci_bus_max_busnr</span></td></tr></table></div></body></html>
274