1<html><head><meta http-equiv="Content-Type" content="text/html; charset=ANSI_X3.4-1968"><title>Chapter&#160;6.&#160;Locking on SMP</title><meta name="generator" content="DocBook XSL Stylesheets V1.78.1"><link rel="home" href="index.html" title="Linux generic IRQ handling"><link rel="up" href="index.html" title="Linux generic IRQ handling"><link rel="prev" href="doirq.html" title="Chapter&#160;5.&#160;__do_IRQ entry point"><link rel="next" href="genericchip.html" title="Chapter&#160;7.&#160;Generic interrupt chip"></head><body bgcolor="white" text="black" link="#0000FF" vlink="#840084" alink="#0000FF"><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter&#160;6.&#160;Locking on SMP</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="doirq.html">Prev</a>&#160;</td><th width="60%" align="center">&#160;</th><td width="20%" align="right">&#160;<a accesskey="n" href="genericchip.html">Next</a></td></tr></table><hr></div><div class="chapter"><div class="titlepage"><div><div><h1 class="title"><a name="locking"></a>Chapter&#160;6.&#160;Locking on SMP</h1></div></div></div><p>
2	The locking of chip registers is up to the architecture that
3	defines the chip primitives. The per-irq structure is
4	protected via desc-&gt;lock, by the generic layer.
5     </p></div><div class="navfooter"><hr><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="doirq.html">Prev</a>&#160;</td><td width="20%" align="center">&#160;</td><td width="40%" align="right">&#160;<a accesskey="n" href="genericchip.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Chapter&#160;5.&#160;__do_IRQ entry point&#160;</td><td width="20%" align="center"><a accesskey="h" href="index.html">Home</a></td><td width="40%" align="right" valign="top">&#160;Chapter&#160;7.&#160;Generic interrupt chip</td></tr></table></div></body></html>
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