1<html><head><meta http-equiv="Content-Type" content="text/html; charset=ANSI_X3.4-1968"><title>Linux DRM Developer's Guide</title><meta name="generator" content="DocBook XSL Stylesheets V1.78.1"><link rel="home" href="index.html" title="Linux DRM Developer's Guide"><link rel="next" href="drmCore.html" title="Part I. DRM Core"></head><body bgcolor="white" text="black" link="#0000FF" vlink="#840084" alink="#0000FF"><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Linux DRM Developer's Guide</th></tr><tr><td width="20%" align="left"> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="drmCore.html">Next</a></td></tr></table><hr></div><div class="book"><div class="titlepage"><div><div><h1 class="title"><a name="drmDevelopersGuide"></a>Linux DRM Developer's Guide</h1></div><div><div class="authorgroup"><div class="author"><h3 class="author"><span class="firstname">Jesse</span> <span class="surname">Barnes</span></h3><span class="contrib">Initial version</span> <div class="affiliation"><span class="orgname">Intel Corporation<br></span><div class="address"><p><br> 2     <code class="email"><<a class="email" href="mailto:jesse.barnes@intel.com">jesse.barnes@intel.com</a>></code><br> 3   </p></div></div></div><div class="author"><h3 class="author"><span class="firstname">Laurent</span> <span class="surname">Pinchart</span></h3><span class="contrib">Driver internals</span> <div class="affiliation"><span class="orgname">Ideas on board SPRL<br></span><div class="address"><p><br> 4     <code class="email"><<a class="email" href="mailto:laurent.pinchart@ideasonboard.com">laurent.pinchart@ideasonboard.com</a>></code><br> 5   </p></div></div></div><div class="author"><h3 class="author"><span class="firstname">Daniel</span> <span class="surname">Vetter</span></h3><span class="contrib">Contributions all over the place</span> <div class="affiliation"><span class="orgname">Intel Corporation<br></span><div class="address"><p><br> 6     <code class="email"><<a class="email" href="mailto:daniel.vetter@ffwll.ch">daniel.vetter@ffwll.ch</a>></code><br> 7   </p></div></div></div></div></div><div><p class="copyright">Copyright © 2008-2009, 2013-2014 Intel Corporation</p></div><div><p class="copyright">Copyright © 2012 Laurent Pinchart</p></div><div><div class="legalnotice"><a name="idp1119824196"></a><p> 8 The contents of this file may be used under the terms of the GNU 9 General Public License version 2 (the "GPL") as distributed in 10 the kernel source COPYING file. 11 </p></div></div><div><div class="revhistory"><table style="border-style:solid; width:100%;" summary="Revision History"><tr><th align="left" valign="top" colspan="3"><b>Revision History</b></th></tr><tr><td align="left">Revision 1.0</td><td align="left">2012-07-13</td><td align="left">LP</td></tr><tr><td align="left" colspan="3">Added extensive documentation about driver internals. 12 </td></tr></table></div></div></div><hr></div><div class="toc"><p><b>Table of Contents</b></p><dl class="toc"><dt><span class="part"><a href="drmCore.html">I. DRM Core</a></span></dt><dd><dl><dt><span class="chapter"><a href="drmIntroduction.html">1. Introduction</a></span></dt><dt><span class="chapter"><a href="drmInternals.html">2. DRM Internals</a></span></dt><dd><dl><dt><span class="sect1"><a href="drmInternals.html#idp1119831828">Driver Initialization</a></span></dt><dd><dl><dt><span class="sect2"><a href="drmInternals.html#idp1119636188">Driver Information</a></span></dt><dt><span class="sect2"><a href="drmInternals.html#idp1119509092">Device Registration</a></span></dt><dt><span class="sect2"><a href="drmInternals.html#idp1122528940">Driver Load</a></span></dt></dl></dd><dt><span class="sect1"><a href="drm-memory-management.html">Memory management</a></span></dt><dd><dl><dt><span class="sect2"><a href="drm-memory-management.html#idp1122551924">The Translation Table Manager (TTM)</a></span></dt><dt><span class="sect2"><a href="drm-memory-management.html#drm-gem">The Graphics Execution Manager (GEM)</a></span></dt><dt><span class="sect2"><a href="drm-memory-management.html#idp1122718668">VMA Offset Manager</a></span></dt><dt><span class="sect2"><a href="drm-memory-management.html#drm-prime-support">PRIME Buffer Sharing</a></span></dt><dt><span class="sect2"><a href="drm-memory-management.html#idp1122911796">PRIME Function References</a></span></dt><dt><span class="sect2"><a href="drm-memory-management.html#idp1122987828">DRM MM Range Allocator</a></span></dt><dt><span class="sect2"><a href="drm-memory-management.html#idp1119448692">DRM MM Range Allocator Function References</a></span></dt><dt><span class="sect2"><a href="drm-memory-management.html#idp1123226860">CMA Helper Functions Reference</a></span></dt></dl></dd><dt><span class="sect1"><a href="drm-mode-setting.html">Mode Setting</a></span></dt><dd><dl><dt><span class="sect2"><a href="drm-mode-setting.html#idp1123353068">Display Modes Function Reference</a></span></dt><dt><span class="sect2"><a href="drm-mode-setting.html#idp1123612996">Atomic Mode Setting Function Reference</a></span></dt><dt><span class="sect2"><a href="drm-mode-setting.html#idp1123785660">Frame Buffer Creation</a></span></dt><dt><span class="sect2"><a href="drm-mode-setting.html#idp1123799668">Dumb Buffer Objects</a></span></dt><dt><span class="sect2"><a href="drm-mode-setting.html#idp1123808604">Output Polling</a></span></dt><dt><span class="sect2"><a href="drm-mode-setting.html#idp1123810164">Locking</a></span></dt></dl></dd><dt><span class="sect1"><a href="drm-kms-init.html">KMS Initialization and Cleanup</a></span></dt><dd><dl><dt><span class="sect2"><a href="drm-kms-init.html#idp1123813300">CRTCs (struct <span class="structname">drm_crtc</span>)</a></span></dt><dt><span class="sect2"><a href="drm-kms-init.html#idp1123834892">Planes (struct <span class="structname">drm_plane</span>)</a></span></dt><dt><span class="sect2"><a href="drm-kms-init.html#idp1123849172">Encoders (struct <span class="structname">drm_encoder</span>)</a></span></dt><dt><span class="sect2"><a href="drm-kms-init.html#idp1123859012">Connectors (struct <span class="structname">drm_connector</span>)</a></span></dt><dt><span class="sect2"><a href="drm-kms-init.html#idp1123892868">Cleanup</a></span></dt><dt><span class="sect2"><a href="drm-kms-init.html#idp1123897460">Output discovery and initialization example</a></span></dt><dt><span class="sect2"><a href="drm-kms-init.html#idp1123898740">KMS API Functions</a></span></dt><dt><span class="sect2"><a href="drm-kms-init.html#idp1124538092">KMS Data Structures</a></span></dt><dt><span class="sect2"><a href="drm-kms-init.html#idp1124843020">KMS Locking</a></span></dt></dl></dd><dt><span class="sect1"><a href="ch02s05.html">Mode Setting Helper Functions</a></span></dt><dd><dl><dt><span class="sect2"><a href="ch02s05.html#idp1124995876">Helper Functions</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1125008132">CRTC Helper Operations</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1125018460">Encoder Helper Operations</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1125024140">Connector Helper Operations</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1125061196">Atomic Modeset Helper Functions Reference</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1125415036">Modeset Helper Functions Reference</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1125575852">Output Probing Helper Functions Reference</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1125647748">fbdev Helper Functions Reference</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1125808116">Display Port Helper Functions Reference</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1125934820">Display Port MST Helper Functions Reference</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1126139892">MIPI DSI Helper Functions Reference</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1126417260">EDID Helper Functions Reference</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1126612844">Rectangle Utilities Reference</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1126805892">Flip-work Helper Reference</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1126875156">HDMI Infoframes Helper Reference</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1126989620">Plane Helper Reference</a></span></dt><dt><span class="sect2"><a href="ch02s05.html#idp1127103124">Tile group</a></span></dt></dl></dd><dt><span class="sect1"><a href="drm-kms-properties.html">KMS Properties</a></span></dt><dd><dl><dt><span class="sect2"><a href="drm-kms-properties.html#idp1127119396">Existing KMS Properties</a></span></dt></dl></dd><dt><span class="sect1"><a href="drm-vertical-blank.html">Vertical Blanking</a></span></dt><dd><dl><dt><span class="sect2"><a href="drm-vertical-blank.html#idp1127382092">Vertical Blanking and Interrupt Handling Functions Reference</a></span></dt></dl></dd><dt><span class="sect1"><a href="ch02s08.html">Open/Close, File Operations and IOCTLs</a></span></dt><dd><dl><dt><span class="sect2"><a href="ch02s08.html#idp1127640468">Open and Close</a></span></dt><dt><span class="sect2"><a href="ch02s08.html#idp1127648684">File Operations</a></span></dt><dt><span class="sect2"><a href="ch02s08.html#idp1127655516">IOCTLs</a></span></dt></dl></dd><dt><span class="sect1"><a href="ch02s09.html">Legacy Support Code</a></span></dt><dd><dl><dt><span class="sect2"><a href="ch02s09.html#idp1127663228">Legacy Suspend/Resume</a></span></dt><dt><span class="sect2"><a href="ch02s09.html#idp1127665524">Legacy DMA Services</a></span></dt></dl></dd></dl></dd><dt><span class="chapter"><a href="drmExternals.html">3. Userland interfaces</a></span></dt><dd><dl><dt><span class="sect1"><a href="drmExternals.html#idp1127670396">Render nodes</a></span></dt><dt><span class="sect1"><a href="ch03s02.html">VBlank event handling</a></span></dt></dl></dd></dl></dd><dt><span class="part"><a href="drmDrivers.html">II. DRM Drivers</a></span></dt><dd><dl><dt><span class="chapter"><a href="drmI915.html">4. drm/i915 Intel GFX Driver</a></span></dt><dd><dl><dt><span class="sect1"><a href="drmI915.html#idp1127682964">Core Driver Infrastructure</a></span></dt><dd><dl><dt><span class="sect2"><a href="drmI915.html#idp1127683628">Runtime Power Management</a></span></dt><dt><span class="sect2"><a href="drmI915.html#idp1127820844">Interrupt Handling</a></span></dt><dt><span class="sect2"><a href="drmI915.html#idp1127853244">Intel GVT-g Guest Support(vGPU)</a></span></dt></dl></dd><dt><span class="sect1"><a href="ch04s02.html">Display Hardware Handling</a></span></dt><dd><dl><dt><span class="sect2"><a href="ch04s02.html#idp1127882228">Mode Setting Infrastructure</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#idp1127883116">Frontbuffer Tracking</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#idp1127966068">Display FIFO Underrun Reporting</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#idp1128014948">Plane Configuration</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#idp1128015892">Atomic Plane Helpers</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#idp1128065636">Output Probing</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#idp1128066516">High Definition Audio</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#idp1128104188">Panel Self Refresh PSR (PSR/SRD)</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#idp1128147260">Frame Buffer Compression (FBC)</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#idp1128179172">Display Refresh Rate Switching (DRRS)</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#idp1128232364">DPIO</a></span></dt></dl></dd><dt><span class="sect1"><a href="ch04s03.html">Memory Management and Command Submission</a></span></dt><dd><dl><dt><span class="sect2"><a href="ch04s03.html#idp1128258212">Batchbuffer Parsing</a></span></dt><dt><span class="sect2"><a href="ch04s03.html#idp1128310204">Batchbuffer Pools</a></span></dt><dt><span class="sect2"><a href="ch04s03.html#idp1128337188">Logical Rings, Logical Ring Contexts and Execlists</a></span></dt><dt><span class="sect2"><a href="ch04s03.html#idp1128435628">Global GTT views</a></span></dt><dt><span class="sect2"><a href="ch04s03.html#idp1128473508">Buffer Object Eviction</a></span></dt><dt><span class="sect2"><a href="ch04s03.html#idp1128510940">Buffer Object Memory Shrinking</a></span></dt></dl></dd><dt><span class="sect1"><a href="ch04s04.html"> Tracing </a></span></dt><dd><dl><dt><span class="sect2"><a href="ch04s04.html#idp1128541092"> i915_ppgtt_create and i915_ppgtt_release </a></span></dt><dt><span class="sect2"><a href="ch04s04.html#idp1128542276"> i915_context_create and i915_context_free </a></span></dt><dt><span class="sect2"><a href="ch04s04.html#idp1128543204"> switch_mm </a></span></dt></dl></dd></dl></dd></dl></dd></dl></div><div class="list-of-tables"><p><b>List of Tables</b></p><dl><dt>2.1. <a href="drm-kms-properties.html#idp1127120116"></a></dt><dt>4.1. <a href="ch04s02.html#dpiox2">Dual channel PHY (VLV/CHV)</a></dt><dt>4.2. <a href="ch04s02.html#dpiox1">Single channel PHY (CHV)</a></dt></dl></div></div><div class="navfooter"><hr><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"> </td><td width="20%" align="center"> </td><td width="40%" align="right"> <a accesskey="n" href="drmCore.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top"> </td><td width="20%" align="center"> </td><td width="40%" align="right" valign="top"> Part I. DRM Core</td></tr></table></div></body></html> 13