Searched refs:sandybridge_pcode_write (Results 1 - 3 of 3) sorted by relevance
/linux-4.4.14/drivers/gpu/drm/i915/ |
H A D | intel_pm.c | 4997 ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_MIN_FREQ_TABLE, 0); gen6_enable_rps() 5021 ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_RC6VIDS, rc6vids); gen6_enable_rps() 5106 sandybridge_pcode_write(dev_priv, __gen6_update_ring_freq() 7177 int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u32 mbox, u32 val) sandybridge_pcode_write() function
|
H A D | intel_display.c | 4594 WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, 0xc0000000)); hsw_enable_ips() 4624 WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, 0)); hsw_disable_ips() 5514 ret = sandybridge_pcode_write(dev_priv, HSW_PCODE_DE_WRITE_FREQ_REQ, broxton_set_cdclk() 5574 ret = sandybridge_pcode_write(dev_priv, HSW_PCODE_DE_WRITE_FREQ_REQ, broxton_set_cdclk() 5798 sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL, pcu_ack); skl_set_cdclk() 9392 if (sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_D_COMP, hsw_write_dcomp() 9617 ret = sandybridge_pcode_write(dev_priv, broadwell_set_cdclk() 9669 sandybridge_pcode_write(dev_priv, HSW_PCODE_DE_WRITE_FREQ_REQ, data); broadwell_set_cdclk()
|
H A D | i915_drv.h | 3388 int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u32 mbox, u32 val); intel_unregister_dsm_handler()
|
Completed in 316 milliseconds