| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | mcp77.c | 86 u32 mast = nvkm_rd32(device, 0x00c054); mcp77_clk_read() local
99 switch (mast & 0x000c0000) { mcp77_clk_read()
109 switch (mast & 0x00000003) { mcp77_clk_read()
117 if ((mast & 0x03000000) != 0x03000000) mcp77_clk_read()
120 if ((mast & 0x00000200) == 0x00000000) mcp77_clk_read()
123 switch (mast & 0x00000c00) { mcp77_clk_read()
131 switch (mast & 0x00000030) { mcp77_clk_read()
133 if (mast & 0x00000040) mcp77_clk_read()
147 switch (mast & 0x00400000) { mcp77_clk_read()
160 nvkm_debug(subdev, "unknown clock source %d %08x\n", src, mast); mcp77_clk_read()
304 u32 pllmask = 0, mast; mcp77_clk_prog() local
314 mast = nvkm_mask(device, 0xc054, 0x03400e70, 0x03400640); mcp77_clk_prog()
315 mast &= ~0x00400e73; mcp77_clk_prog()
316 mast |= 0x03000000; mcp77_clk_prog()
321 mast |= 0x00000002; mcp77_clk_prog()
328 mast |= 0x00000003; mcp77_clk_prog()
338 /* mast |= 0x00000000; */ mcp77_clk_prog()
342 mast |= 0x00000020; mcp77_clk_prog()
349 mast |= 0x00000030; mcp77_clk_prog()
365 mast |= 0x00400000; mcp77_clk_prog()
370 nvkm_wr32(device, 0xc054, mast); mcp77_clk_prog()
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| H A D | nv50.c | 129 u32 src, mast = nvkm_rd32(device, 0x00c040); read_pll_ref() local
133 src = !!(mast & 0x00200000); read_pll_ref()
136 src = !!(mast & 0x00400000); read_pll_ref()
139 src = !!(mast & 0x00010000); read_pll_ref()
142 src = !!(mast & 0x02000000); read_pll_ref()
161 u32 mast = nvkm_rd32(device, 0x00c040); read_pll() local
168 if (base == 0x004028 && (mast & 0x00100000)) { read_pll()
197 u32 mast = nvkm_rd32(device, 0x00c040); nv50_clk_read() local
212 switch (mast & 0x30000000) { nv50_clk_read()
220 if (!(mast & 0x00100000)) nv50_clk_read()
222 switch (mast & 0x00000003) { nv50_clk_read()
231 switch (mast & 0x00000030) { nv50_clk_read()
233 if (mast & 0x00000080) nv50_clk_read()
244 switch (mast & 0x0000c000) { nv50_clk_read()
264 switch (mast & 0x00000c00) { nv50_clk_read()
272 if (mast & 0x01000000) nv50_clk_read()
280 switch (mast & 0x00000c00) { nv50_clk_read()
305 switch (mast & 0x0c000000) { nv50_clk_read()
320 nvkm_debug(subdev, "unknown clock source %d %08x\n", src, mast); nv50_clk_read()
446 clk_mask(hwsq, mast, mastm, 0x00000000); nv50_clk_calc()
448 clk_mask(hwsq, mast, mastm, mastv); nv50_clk_calc()
454 clk_mask(hwsq, mast, 0x001000b0, 0x00100080); nv50_clk_calc()
456 clk_mask(hwsq, mast, 0x000000b3, 0x00000081); nv50_clk_calc()
475 clk_mask(hwsq, mast, 0x00100033, 0x00000023); nv50_clk_calc()
484 clk_mask(hwsq, mast, 0x00100033, 0x00000033); nv50_clk_calc()
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| H A D | nv40.c | 102 u32 mast = nvkm_rd32(device, 0x00c040); nv40_clk_read() local
110 return read_clk(clk, (mast & 0x00000003) >> 0); nv40_clk_read()
112 return read_clk(clk, (mast & 0x00000030) >> 4); nv40_clk_read()
119 nvkm_debug(subdev, "unknown clock source %d %08x\n", src, mast); nv40_clk_read()
|
| /linux-4.4.14/drivers/gpu/drm/nouveau/ |
| H A D | nv50_display.c | 397 struct nv50_mast mast; member in struct:nv50_disp
410 #define nv50_mast(d) (&nv50_disp(d)->mast)
486 struct nv50_mast *mast = nv50_mast(dev); evo_sync() local
487 u32 *push = evo_wait(mast, 8); evo_sync()
495 evo_kick(push, mast); evo_sync()
695 struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); nv50_crtc_set_dither() local
716 push = evo_wait(mast, 4); nv50_crtc_set_dither()
718 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { nv50_crtc_set_dither()
722 if (nv50_vers(mast) < GK104_DISP_CORE_CHANNEL_DMA) { nv50_crtc_set_dither()
734 evo_kick(push, mast); nv50_crtc_set_dither()
743 struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); nv50_crtc_set_scale() local
814 push = evo_wait(mast, 8); nv50_crtc_set_scale()
816 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { nv50_crtc_set_scale()
836 evo_kick(push, mast); nv50_crtc_set_scale()
851 struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); nv50_crtc_set_raster_vblank_dmi() local
854 push = evo_wait(mast, 8); nv50_crtc_set_raster_vblank_dmi()
860 evo_kick(push, mast); nv50_crtc_set_raster_vblank_dmi()
867 struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); nv50_crtc_set_color_vibrance() local
875 push = evo_wait(mast, 16); nv50_crtc_set_color_vibrance()
877 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { nv50_crtc_set_color_vibrance()
889 evo_kick(push, mast); nv50_crtc_set_color_vibrance()
900 struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); nv50_crtc_set_image() local
903 push = evo_wait(mast, 16); nv50_crtc_set_image()
905 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { nv50_crtc_set_image()
914 if (nv50_vers(mast) > NV50_DISP_CORE_CHANNEL_DMA) { nv50_crtc_set_image()
934 evo_kick(push, mast); nv50_crtc_set_image()
944 struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); nv50_crtc_cursor_show() local
945 u32 *push = evo_wait(mast, 16); nv50_crtc_cursor_show()
947 if (nv50_vers(mast) < G82_DISP_CORE_CHANNEL_DMA) { nv50_crtc_cursor_show()
952 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { nv50_crtc_cursor_show()
957 evo_data(push, mast->base.vram.handle); nv50_crtc_cursor_show()
963 evo_data(push, mast->base.vram.handle); nv50_crtc_cursor_show()
965 evo_kick(push, mast); nv50_crtc_cursor_show()
973 struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); nv50_crtc_cursor_hide() local
974 u32 *push = evo_wait(mast, 16); nv50_crtc_cursor_hide()
976 if (nv50_vers(mast) < G82_DISP_CORE_CHANNEL_DMA) { nv50_crtc_cursor_hide()
980 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { nv50_crtc_cursor_hide()
991 evo_kick(push, mast); nv50_crtc_cursor_hide()
999 struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); nv50_crtc_cursor_show_hide() local
1007 u32 *push = evo_wait(mast, 2); nv50_crtc_cursor_show_hide()
1011 evo_kick(push, mast); nv50_crtc_cursor_show_hide()
1025 struct nv50_mast *mast = nv50_mast(crtc->dev); nv50_crtc_prepare() local
1030 push = evo_wait(mast, 6); nv50_crtc_prepare()
1032 if (nv50_vers(mast) < G82_DISP_CORE_CHANNEL_DMA) { nv50_crtc_prepare()
1038 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { nv50_crtc_prepare()
1054 evo_kick(push, mast); nv50_crtc_prepare()
1064 struct nv50_mast *mast = nv50_mast(crtc->dev); nv50_crtc_commit() local
1067 push = evo_wait(mast, 32); nv50_crtc_commit()
1069 if (nv50_vers(mast) < G82_DISP_CORE_CHANNEL_DMA) { nv50_crtc_commit()
1076 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { nv50_crtc_commit()
1083 evo_data(push, mast->base.vram.handle); nv50_crtc_commit()
1093 evo_data(push, mast->base.vram.handle); nv50_crtc_commit()
1098 evo_kick(push, mast); nv50_crtc_commit()
1135 struct nv50_mast *mast = nv50_mast(crtc->dev); nv50_crtc_mode_set() local
1174 push = evo_wait(mast, 64); nv50_crtc_mode_set()
1176 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { nv50_crtc_mode_set()
1211 evo_kick(push, mast); nv50_crtc_mode_set()
1219 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) nv50_crtc_mode_set()
1576 struct nv50_mast *mast = nv50_mast(encoder->dev); nv50_dac_mode_set() local
1583 push = evo_wait(mast, 8); nv50_dac_mode_set()
1585 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { nv50_dac_mode_set()
1615 evo_kick(push, mast); nv50_dac_mode_set()
1625 struct nv50_mast *mast = nv50_mast(encoder->dev); nv50_dac_disconnect() local
1632 push = evo_wait(mast, 4); nv50_dac_disconnect()
1634 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { nv50_dac_disconnect()
1641 evo_kick(push, mast); nv50_dac_disconnect()
1896 struct nv50_mast *mast = nv50_mast(nv_encoder->base.base.dev); nv50_sor_ctrl() local
1898 if (temp != nv_encoder->ctrl && (push = evo_wait(mast, 2))) { nv50_sor_ctrl()
1899 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { nv50_sor_ctrl()
1906 evo_kick(push, mast); nv50_sor_ctrl()
1948 struct nv50_mast *mast = nv50_mast(encoder->dev); nv50_sor_mode_set() local
2031 if (nv50_vers(mast) >= GF110_DISP) { nv50_sor_mode_set()
2032 u32 *push = evo_wait(mast, 3); nv50_sor_mode_set()
2048 evo_kick(push, mast); nv50_sor_mode_set()
2179 struct nv50_mast *mast = nv50_mast(encoder->dev); nv50_pior_mode_set() local
2207 push = evo_wait(mast, 8); nv50_pior_mode_set()
2209 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { nv50_pior_mode_set()
2219 evo_kick(push, mast); nv50_pior_mode_set()
2229 struct nv50_mast *mast = nv50_mast(encoder->dev); nv50_pior_disconnect() local
2236 push = evo_wait(mast, 4); nv50_pior_disconnect()
2238 if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) { nv50_pior_disconnect()
2242 evo_kick(push, mast); nv50_pior_disconnect()
2335 struct nv50_mast *mast = nv50_mast(dev); nv50_fbdma_init() local
2393 ret = nvif_object_init(&mast->base.base.user, name, NV_DMA_IN_MEMORY, nv50_fbdma_init()
2494 nv50_dmac_destroy(&disp->mast.base, disp->disp); nv50_display_destroy()
2548 &disp->mast); nv50_display_create()
|
| /linux-4.4.14/drivers/usb/chipidea/ |
| H A D | core.c | 530 * @mask: mast bit
|
| /linux-4.4.14/drivers/net/wireless/ath/ath10k/ |
| H A D | htt.h | 81 * but the host shall use the bit-mast + bit-shift defs, to be endian-
|
| /linux-4.4.14/mm/ |
| H A D | memory_hotplug.c | 405 /* the move out part mast at the right most of @z1 */ move_pfn_range_right()
|
| /linux-4.4.14/drivers/staging/slicoss/ |
| H A D | slicoss.c | 193 * Commit our multicast mast to the SLIC by writing to the slic_mcast_set_mask()
|