Searched refs:divider_reg (Results 1 – 3 of 3) sorted by relevance
202 void __iomem *divider_reg; /* CSR for divider */ member313 if (pclk->param.divider_reg) { in xgene_clk_recalc_rate()314 data = xgene_clk_read(pclk->param.divider_reg + in xgene_clk_recalc_rate()343 if (pclk->param.divider_reg) { in xgene_clk_set_rate()352 data = xgene_clk_read(pclk->param.divider_reg + in xgene_clk_set_rate()356 xgene_clk_write(data, pclk->param.divider_reg + in xgene_clk_set_rate()377 if (pclk->param.divider_reg) { in xgene_clk_round_rate()456 parameters.divider_reg = NULL; in xgene_devclk_init()475 parameters.divider_reg = map_res; in xgene_devclk_init()514 if (parameters.divider_reg) in xgene_devclk_init()[all …]
73 uint32_t divider_reg; member117 .divider_reg = _div_reg, \
196 div->reg = base + mc->divider_reg; in mtk_clk_register_composite()