Searched refs:cp_write (Results 1 - 2 of 2) sorted by relevance

/linux-4.4.14/drivers/media/i2c/
H A Dadv7842.c556 static inline int cp_write(struct v4l2_subdev *sd, u8 reg, u8 val) cp_write() function
565 return cp_write(sd, reg, (cp_read(sd, reg) & mask) | val); cp_write_and_or()
969 cp_write(sd, reg->reg & 0xff, val); adv7842_s_register()
1036 cp_write(sd, 0x26, 0x00); configure_predefined_video_timings()
1037 cp_write(sd, 0x27, 0x00); configure_predefined_video_timings()
1038 cp_write(sd, 0x28, 0x00); configure_predefined_video_timings()
1039 cp_write(sd, 0x29, 0x00); configure_predefined_video_timings()
1040 cp_write(sd, 0x8f, 0x40); configure_predefined_video_timings()
1041 cp_write(sd, 0x90, 0x00); configure_predefined_video_timings()
1042 cp_write(sd, 0xa5, 0x00); configure_predefined_video_timings()
1043 cp_write(sd, 0xa6, 0x00); configure_predefined_video_timings()
1044 cp_write(sd, 0xa7, 0x00); configure_predefined_video_timings()
1045 cp_write(sd, 0xab, 0x00); configure_predefined_video_timings()
1046 cp_write(sd, 0xac, 0x00); configure_predefined_video_timings()
1113 cp_write(sd, 0x26, (cp_start_sav >> 8) & 0xf); configure_custom_video_timings()
1114 cp_write(sd, 0x27, (cp_start_sav & 0xff)); configure_custom_video_timings()
1115 cp_write(sd, 0x28, (cp_start_eav >> 8) & 0xf); configure_custom_video_timings()
1116 cp_write(sd, 0x29, (cp_start_eav & 0xff)); configure_custom_video_timings()
1119 cp_write(sd, 0xa5, (cp_start_vbi >> 4) & 0xff); configure_custom_video_timings()
1120 cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) | configure_custom_video_timings()
1122 cp_write(sd, 0xa7, cp_end_vbi & 0xff); configure_custom_video_timings()
1136 cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7); configure_custom_video_timings()
1137 cp_write(sd, 0x90, ch1_fr_ll & 0xff); configure_custom_video_timings()
1138 cp_write(sd, 0xab, (height >> 4) & 0xff); configure_custom_video_timings()
1139 cp_write(sd, 0xac, (height & 0x0f) << 4); configure_custom_video_timings()
1297 cp_write(sd, 0x3c, ctrl->val); adv7842_s_ctrl()
1302 cp_write(sd, 0x3a, ctrl->val); adv7842_s_ctrl()
1307 cp_write(sd, 0x3b, ctrl->val); adv7842_s_ctrl()
1312 cp_write(sd, 0x3d, ctrl->val); adv7842_s_ctrl()
1346 cp_write(sd, 0xc1, R); adv7842_s_ctrl()
1347 cp_write(sd, 0xc0, G); adv7842_s_ctrl()
1348 cp_write(sd, 0xc2, B); adv7842_s_ctrl()
1677 cp_write(sd, 0x91, bt->interlaced ? 0x40 : 0x00); adv7842_s_dv_timings()
1864 cp_write(sd, 0x73, 0x10); select_input()
1865 cp_write(sd, 0x74, 0x04); select_input()
1866 cp_write(sd, 0x75, 0x01); select_input()
1867 cp_write(sd, 0x76, 0x00); select_input()
1869 cp_write(sd, 0x3e, 0x04); /* CP core pre-gain control */ select_input()
1870 cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */ select_input()
1871 cp_write(sd, 0x40, 0x5c); /* CP core pre-gain control. Graphics mode */ select_input()
1916 cp_write(sd, 0x73, 0x10); select_input()
1917 cp_write(sd, 0x74, 0x04); select_input()
1918 cp_write(sd, 0x75, 0x01); select_input()
1919 cp_write(sd, 0x76, 0x00); select_input()
1926 cp_write(sd, 0x3e, 0x00); /* CP core pre-gain control */ select_input()
1929 cp_write(sd, 0xc3, 0x33); /* Component mode */ select_input()
2797 cp_write(sd, 0x69, 0x14); /* Enable CP CSC */ adv7842_core_init()
2799 cp_write(sd, 0xf3, 0xdc); /* Low threshold to enter/exit free run mode */ adv7842_core_init()
H A Dadv7604.c616 static inline int cp_write(struct v4l2_subdev *sd, u8 reg, u8 val) cp_write() function
625 return cp_write(sd, reg, (cp_read(sd, reg) & ~mask) | val); cp_write_clr_set()
934 cp_write(sd, 0x8f, 0x00); configure_predefined_video_timings()
935 cp_write(sd, 0x90, 0x00); configure_predefined_video_timings()
936 cp_write(sd, 0xa2, 0x00); configure_predefined_video_timings()
937 cp_write(sd, 0xa3, 0x00); configure_predefined_video_timings()
938 cp_write(sd, 0xa4, 0x00); configure_predefined_video_timings()
939 cp_write(sd, 0xa5, 0x00); configure_predefined_video_timings()
940 cp_write(sd, 0xa6, 0x00); configure_predefined_video_timings()
941 cp_write(sd, 0xa7, 0x00); configure_predefined_video_timings()
942 cp_write(sd, 0xab, 0x00); configure_predefined_video_timings()
943 cp_write(sd, 0xac, 0x00); configure_predefined_video_timings()
1001 cp_write(sd, 0xa2, (cp_start_sav >> 4) & 0xff); configure_custom_video_timings()
1002 cp_write(sd, 0xa3, ((cp_start_sav & 0x0f) << 4) | configure_custom_video_timings()
1004 cp_write(sd, 0xa4, cp_start_eav & 0xff); configure_custom_video_timings()
1007 cp_write(sd, 0xa5, (cp_start_vbi >> 4) & 0xff); configure_custom_video_timings()
1008 cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) | configure_custom_video_timings()
1010 cp_write(sd, 0xa7, cp_end_vbi & 0xff); configure_custom_video_timings()
1021 cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7); configure_custom_video_timings()
1022 cp_write(sd, 0x90, ch1_fr_ll & 0xff); configure_custom_video_timings()
1023 cp_write(sd, 0xab, (height >> 4) & 0xff); configure_custom_video_timings()
1024 cp_write(sd, 0xac, (height & 0x0f) << 4); configure_custom_video_timings()
1181 cp_write(sd, 0x3c, ctrl->val); adv76xx_s_ctrl()
1184 cp_write(sd, 0x3a, ctrl->val); adv76xx_s_ctrl()
1187 cp_write(sd, 0x3b, ctrl->val); adv76xx_s_ctrl()
1190 cp_write(sd, 0x3d, ctrl->val); adv76xx_s_ctrl()
1211 cp_write(sd, 0xc0, (ctrl->val & 0xff0000) >> 16); adv76xx_s_ctrl()
1212 cp_write(sd, 0xc1, (ctrl->val & 0x00ff00) >> 8); adv76xx_s_ctrl()
1213 cp_write(sd, 0xc2, (u8)(ctrl->val & 0x0000ff)); adv76xx_s_ctrl()
1751 cp_write(sd, 0x3e, 0x00); /* CP core pre-gain control */ select_input()
1752 cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */ select_input()
1753 cp_write(sd, 0x40, 0x80); /* CP core pre-gain control. Graphics mode */ select_input()
2479 cp_write(sd, 0xcf, 0x01); /* Power down macrovision */ adv76xx_core_init()
2491 cp_write(sd, 0x69, 0x30); /* Enable CP CSC */ adv76xx_core_init()
2502 cp_write(sd, 0xba, (pdata->hdmi_free_run_mode << 1) | 0x01); /* HDMI free run */ adv76xx_core_init()
2503 cp_write(sd, 0xf3, 0xdc); /* Low threshold to enter/exit free run mode */ adv76xx_core_init()
2504 cp_write(sd, 0xf9, 0x23); /* STDI ch. 1 - LCVS change threshold - adv76xx_core_init()
2506 cp_write(sd, 0x45, 0x23); /* STDI ch. 2 - LCVS change threshold - adv76xx_core_init()
2508 cp_write(sd, 0xc9, 0x2d); /* use prim_mode and vid_std as free run resolution adv76xx_core_init()

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