556 static inline int cp_write(struct v4l2_subdev *sd, u8 reg, u8 val)  in cp_write()  function
565 	return cp_write(sd, reg, (cp_read(sd, reg) & mask) | val);  in cp_write_and_or()
969 		cp_write(sd, reg->reg & 0xff, val);  in adv7842_s_register()
1036 	cp_write(sd, 0x26, 0x00);  in configure_predefined_video_timings()
1037 	cp_write(sd, 0x27, 0x00);  in configure_predefined_video_timings()
1038 	cp_write(sd, 0x28, 0x00);  in configure_predefined_video_timings()
1039 	cp_write(sd, 0x29, 0x00);  in configure_predefined_video_timings()
1040 	cp_write(sd, 0x8f, 0x40);  in configure_predefined_video_timings()
1041 	cp_write(sd, 0x90, 0x00);  in configure_predefined_video_timings()
1042 	cp_write(sd, 0xa5, 0x00);  in configure_predefined_video_timings()
1043 	cp_write(sd, 0xa6, 0x00);  in configure_predefined_video_timings()
1044 	cp_write(sd, 0xa7, 0x00);  in configure_predefined_video_timings()
1045 	cp_write(sd, 0xab, 0x00);  in configure_predefined_video_timings()
1046 	cp_write(sd, 0xac, 0x00);  in configure_predefined_video_timings()
1113 		cp_write(sd, 0x26, (cp_start_sav >> 8) & 0xf);  in configure_custom_video_timings()
1114 		cp_write(sd, 0x27, (cp_start_sav & 0xff));  in configure_custom_video_timings()
1115 		cp_write(sd, 0x28, (cp_start_eav >> 8) & 0xf);  in configure_custom_video_timings()
1116 		cp_write(sd, 0x29, (cp_start_eav & 0xff));  in configure_custom_video_timings()
1119 		cp_write(sd, 0xa5, (cp_start_vbi >> 4) & 0xff);  in configure_custom_video_timings()
1120 		cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) |  in configure_custom_video_timings()
1122 		cp_write(sd, 0xa7, cp_end_vbi & 0xff);  in configure_custom_video_timings()
1136 	cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7);  in configure_custom_video_timings()
1137 	cp_write(sd, 0x90, ch1_fr_ll & 0xff);  in configure_custom_video_timings()
1138 	cp_write(sd, 0xab, (height >> 4) & 0xff);  in configure_custom_video_timings()
1139 	cp_write(sd, 0xac, (height & 0x0f) << 4);  in configure_custom_video_timings()
1297 		cp_write(sd, 0x3c, ctrl->val);  in adv7842_s_ctrl()
1302 		cp_write(sd, 0x3a, ctrl->val);  in adv7842_s_ctrl()
1307 		cp_write(sd, 0x3b, ctrl->val);  in adv7842_s_ctrl()
1312 		cp_write(sd, 0x3d, ctrl->val);  in adv7842_s_ctrl()
1346 		cp_write(sd, 0xc1, R);  in adv7842_s_ctrl()
1347 		cp_write(sd, 0xc0, G);  in adv7842_s_ctrl()
1348 		cp_write(sd, 0xc2, B);  in adv7842_s_ctrl()
1677 	cp_write(sd, 0x91, bt->interlaced ? 0x40 : 0x00);  in adv7842_s_dv_timings()
1864 		cp_write(sd, 0x73, 0x10);  in select_input()
1865 		cp_write(sd, 0x74, 0x04);  in select_input()
1866 		cp_write(sd, 0x75, 0x01);  in select_input()
1867 		cp_write(sd, 0x76, 0x00);  in select_input()
1869 		cp_write(sd, 0x3e, 0x04); /* CP core pre-gain control */  in select_input()
1870 		cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */  in select_input()
1871 		cp_write(sd, 0x40, 0x5c); /* CP core pre-gain control. Graphics mode */  in select_input()
1916 		cp_write(sd, 0x73, 0x10);  in select_input()
1917 		cp_write(sd, 0x74, 0x04);  in select_input()
1918 		cp_write(sd, 0x75, 0x01);  in select_input()
1919 		cp_write(sd, 0x76, 0x00);  in select_input()
1926 		cp_write(sd, 0x3e, 0x00); /* CP core pre-gain control */  in select_input()
1929 		cp_write(sd, 0xc3, 0x33); /* Component mode */  in select_input()
2797 	cp_write(sd, 0x69, 0x14);   /* Enable CP CSC */  in adv7842_core_init()
2799 	cp_write(sd, 0xf3, 0xdc); /* Low threshold to enter/exit free run mode */  in adv7842_core_init()