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Searched refs:clkrate (Results 1 – 24 of 24) sorted by relevance

/linux-4.4.14/arch/arm/plat-omap/
Di2c.c60 i2c_pdata[ints[1] - 1].clkrate = ints[2]; in omap_i2c_bus_setup()
61 i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP; in omap_i2c_bus_setup()
76 if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) { in omap_register_i2c_bus_cmdline()
77 i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; in omap_register_i2c_bus_cmdline()
96 int __init omap_register_i2c_bus(int bus_id, u32 clkrate, in omap_register_i2c_bus() argument
110 if (!i2c_pdata[bus_id - 1].clkrate) in omap_register_i2c_bus()
111 i2c_pdata[bus_id - 1].clkrate = clkrate; in omap_register_i2c_bus()
113 i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; in omap_register_i2c_bus()
/linux-4.4.14/arch/arm/mach-lpc32xx/
Dtimer.c92 u32 clkrate, pllreg; in lpc32xx_timer_init() local
106 clkrate = LPC32XX_MAIN_OSC_FREQ; in lpc32xx_timer_init()
108 clkrate = 397 * LPC32XX_CLOCK_OSC_FREQ; in lpc32xx_timer_init()
112 clkrate = clk_get_pllrate_from_reg(clkrate, pllreg); in lpc32xx_timer_init()
115 clkrate = clkrate / clk_get_pclk_div(); in lpc32xx_timer_init()
132 clockevents_config_and_register(&lpc32xx_clkevt, clkrate, 1, -1); in lpc32xx_timer_init()
143 "lpc32xx_clksrc", clkrate, 300, 32, clocksource_mmio_readl_up); in lpc32xx_timer_init()
/linux-4.4.14/arch/arm/mach-davinci/
Daemif.c104 unsigned long clkrate) in davinci_aemif_setup_timing() argument
113 clkrate /= 1000; /* turn clock into kHz for ease of use */ in davinci_aemif_setup_timing()
115 ta = aemif_calc_rate(t->ta, clkrate, TA_MAX); in davinci_aemif_setup_timing()
116 rhold = aemif_calc_rate(t->rhold, clkrate, RHOLD_MAX); in davinci_aemif_setup_timing()
117 rstrobe = aemif_calc_rate(t->rstrobe, clkrate, RSTROBE_MAX); in davinci_aemif_setup_timing()
118 rsetup = aemif_calc_rate(t->rsetup, clkrate, RSETUP_MAX); in davinci_aemif_setup_timing()
119 whold = aemif_calc_rate(t->whold, clkrate, WHOLD_MAX); in davinci_aemif_setup_timing()
120 wstrobe = aemif_calc_rate(t->wstrobe, clkrate, WSTROBE_MAX); in davinci_aemif_setup_timing()
121 wsetup = aemif_calc_rate(t->wsetup, clkrate, WSETUP_MAX); in davinci_aemif_setup_timing()
154 unsigned long clkrate; in davinci_aemif_setup() local
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/linux-4.4.14/drivers/w1/masters/
Dmxc_w1.c102 unsigned long clkrate; in mxc_w1_probe() local
116 clkrate = clk_get_rate(mdev->clk); in mxc_w1_probe()
117 if (clkrate < 10000000) in mxc_w1_probe()
121 clkdiv = DIV_ROUND_CLOSEST(clkrate, 1000000); in mxc_w1_probe()
122 clkrate /= clkdiv; in mxc_w1_probe()
123 if ((clkrate < 980000) || (clkrate > 1020000)) in mxc_w1_probe()
125 "Incorrect time base frequency %lu Hz\n", clkrate); in mxc_w1_probe()
/linux-4.4.14/drivers/watchdog/
Dst_lpc_wdt.c51 unsigned long clkrate; member
120 unsigned long clkrate = st_wdog->clkrate; in st_wdog_load_timer() local
122 writel_relaxed(timeout * clkrate, st_wdog->base + LPC_LPA_LSB_OFF); in st_wdog_load_timer()
237 st_wdog->clkrate = clk_get_rate(st_wdog->clk); in st_wdog_probe()
239 if (!st_wdog->clkrate) { in st_wdog_probe()
243 st_wdog_dev.max_timeout = 0xFFFFFFFF / st_wdog->clkrate; in st_wdog_probe()
/linux-4.4.14/drivers/i2c/busses/
Di2c-lpc2k.c359 u32 clkrate; in i2c_lpc2k_probe() local
408 clkrate = clk_get_rate(i2c->clk); in i2c_lpc2k_probe()
409 if (clkrate == 0) { in i2c_lpc2k_probe()
416 clkrate = clkrate / bus_clk_rate; in i2c_lpc2k_probe()
418 scl_high = (clkrate * I2C_STD_MODE_DUTY) / 100; in i2c_lpc2k_probe()
420 scl_high = (clkrate * I2C_FAST_MODE_DUTY) / 100; in i2c_lpc2k_probe()
422 scl_high = (clkrate * I2C_FAST_MODE_PLUS_DUTY) / 100; in i2c_lpc2k_probe()
425 writel(clkrate - scl_high, i2c->base + LPC24XX_I2SCLL); in i2c_lpc2k_probe()
Di2c-stu300.c490 static int stu300_set_clk(struct stu300_dev *dev, unsigned long clkrate) in stu300_set_clk() argument
498 stu300_clktable[i].rate < clkrate) in stu300_set_clk()
503 "(%lu Hz).\n", i ? "high" : "low", clkrate); in stu300_set_clk()
511 "virtbase %p\n", clkrate, dev->speed, dev->virtbase); in stu300_set_clk()
515 val = ((clkrate/dev->speed) - 9)/3 + 1; in stu300_set_clk()
518 val = ((clkrate/dev->speed) - 7)/2 + 1; in stu300_set_clk()
523 clkrate); in stu300_set_clk()
530 clkrate); in stu300_set_clk()
559 unsigned long clkrate; in stu300_init_hw() local
576 clkrate = clk_get_rate(dev->clk); in stu300_init_hw()
[all …]
Di2c-s3c2410.c118 unsigned long clkrate; member
872 i2c->clkrate = clkin; in s3c24xx_i2c_clockrate()
936 delta_f = clk_get_rate(i2c->clk) - i2c->clkrate; in s3c24xx_i2c_cpufreq_transition()
Di2c-omap.c1325 omap->speed = pdata->clkrate; in omap_i2c_probe()
/linux-4.4.14/arch/arm/plat-omap/include/plat/
Di2c.h32 extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
37 static inline int omap_register_i2c_bus(int bus_id, u32 clkrate, in omap_register_i2c_bus() argument
/linux-4.4.14/drivers/spi/
Dspi-fsl-dspi.c176 unsigned long clkrate) in hz_to_spi_baud() argument
187 scale_needed = clkrate / speed_hz; in hz_to_spi_baud()
188 if (clkrate % speed_hz) in hz_to_spi_baud()
206 speed_hz, clkrate); in hz_to_spi_baud()
213 unsigned long clkrate) in ns_delay_scale() argument
220 scale_needed = div_u64_rem((u64)delay_ns * clkrate, NSEC_PER_SEC, in ns_delay_scale()
240 delay_ns, clkrate); in ns_delay_scale()
452 unsigned long clkrate; in dspi_setup() local
480 clkrate = clk_get_rate(dspi->clk); in dspi_setup()
481 hz_to_spi_baud(&pbr, &br, spi->max_speed_hz, clkrate); in dspi_setup()
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/linux-4.4.14/drivers/rtc/
Drtc-st-lpc.c50 unsigned long clkrate; member
101 do_div(lpt, rtc->clkrate); in st_rtc_read_time()
118 lpt = (unsigned long long)secs * rtc->clkrate; in st_rtc_set_time()
180 lpa = (unsigned long long)alarm_secs * rtc->clkrate; in st_rtc_set_alarm()
250 rtc->clkrate = clk_get_rate(rtc->clk); in st_rtc_probe()
251 if (!rtc->clkrate) { in st_rtc_probe()
/linux-4.4.14/drivers/mtd/nand/
Dlpc32xx_mlc.c230 uint32_t clkrate, tmp; in lpc32xx_nand_setup() local
237 clkrate = clk_get_rate(host->clk); in lpc32xx_nand_setup()
238 if (clkrate == 0) in lpc32xx_nand_setup()
239 clkrate = 104000000; in lpc32xx_nand_setup()
255 tmp |= MLCTIMEREG_TCEA_DELAY(clkrate / host->ncfg->tcea_delay + 1); in lpc32xx_nand_setup()
256 tmp |= MLCTIMEREG_BUSY_DELAY(clkrate / host->ncfg->busy_delay + 1); in lpc32xx_nand_setup()
257 tmp |= MLCTIMEREG_NAND_TA(clkrate / host->ncfg->nand_ta + 1); in lpc32xx_nand_setup()
258 tmp |= MLCTIMEREG_RD_HIGH(clkrate / host->ncfg->rd_high + 1); in lpc32xx_nand_setup()
259 tmp |= MLCTIMEREG_RD_LOW(clkrate / host->ncfg->rd_low); in lpc32xx_nand_setup()
260 tmp |= MLCTIMEREG_WR_HIGH(clkrate / host->ncfg->wr_high + 1); in lpc32xx_nand_setup()
[all …]
Dlpc32xx_slc.c227 uint32_t clkrate, tmp; in lpc32xx_nand_setup() local
240 clkrate = clk_get_rate(host->clk); in lpc32xx_nand_setup()
241 if (clkrate == 0) in lpc32xx_nand_setup()
242 clkrate = LPC32XX_DEF_BUS_RATE; in lpc32xx_nand_setup()
246 SLCTAC_WWIDTH(clkrate, host->ncfg->wwidth) | in lpc32xx_nand_setup()
247 SLCTAC_WHOLD(clkrate, host->ncfg->whold) | in lpc32xx_nand_setup()
248 SLCTAC_WSETUP(clkrate, host->ncfg->wsetup) | in lpc32xx_nand_setup()
250 SLCTAC_RWIDTH(clkrate, host->ncfg->rwidth) | in lpc32xx_nand_setup()
251 SLCTAC_RHOLD(clkrate, host->ncfg->rhold) | in lpc32xx_nand_setup()
252 SLCTAC_RSETUP(clkrate, host->ncfg->rsetup); in lpc32xx_nand_setup()
Ds3c2410.c269 unsigned long clkrate = clk_get_rate(info->clk); in s3c2410_nand_setrate() local
275 info->clk_rate = clkrate; in s3c2410_nand_setrate()
276 clkrate /= 1000; /* turn clock into kHz for ease of use */ in s3c2410_nand_setrate()
279 tacls = s3c_nand_calc_rate(plat->tacls, clkrate, tacls_max); in s3c2410_nand_setrate()
280 twrph0 = s3c_nand_calc_rate(plat->twrph0, clkrate, 8); in s3c2410_nand_setrate()
281 twrph1 = s3c_nand_calc_rate(plat->twrph1, clkrate, 8); in s3c2410_nand_setrate()
295 tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), in s3c2410_nand_setrate()
296 twrph1, to_ns(twrph1, clkrate)); in s3c2410_nand_setrate()
/linux-4.4.14/Documentation/devicetree/bindings/sound/
Dda7213.txt21 - dlg,dmic-clkrate : DMIC clock frequency (Hz).
40 dlg,dmic-clkrate = <3000000>;
/linux-4.4.14/include/linux/
Di2c-omap.h32 u32 clkrate; member
/linux-4.4.14/arch/arm/mach-omap2/
Dtwl-common.h38 void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
Dtwl-common.c56 void __init omap_pmic_init(int bus, u32 clkrate, in omap_pmic_init() argument
66 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); in omap_pmic_init()
/linux-4.4.14/drivers/mmc/host/
Dpxamci.c61 unsigned long clkrate; member
200 clks = (unsigned long long)data->timeout_ns * host->clkrate; in pxamci_setup_data()
474 unsigned long rate = host->clkrate; in pxamci_set_ios()
705 host->clkrate = clk_get_rate(host->clk); in pxamci_probe()
710 mmc->f_min = (host->clkrate + 63) / 64; in pxamci_probe()
711 mmc->f_max = (mmc_has_26MHz()) ? 26000000 : host->clkrate; in pxamci_probe()
/linux-4.4.14/sound/soc/samsung/
Ds3c-i2s-v2.c566 unsigned long clkrate = clk_get_rate(clk); in s3c_i2sv2_iis_calc_rate() local
578 pr_debug("Input clock rate %ldHz\n", clkrate); in s3c_i2sv2_iis_calc_rate()
586 fsclk = clkrate / fsdiv; in s3c_i2sv2_iis_calc_rate()
595 actual = clkrate / (fsdiv * div); in s3c_i2sv2_iis_calc_rate()
/linux-4.4.14/drivers/gpu/ipu-v3/
Dipu-di.c453 unsigned long rate, clkrate; in ipu_di_config_clock() local
456 clkrate = clk_get_rate(di->clk_ipu); in ipu_di_config_clock()
457 div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock); in ipu_di_config_clock()
459 rate = clkrate / div; in ipu_di_config_clock()
/linux-4.4.14/sound/soc/fsl/
Dfsl_ssi.c649 unsigned long clkrate, baudrate, tmprate; in fsl_ssi_set_bclk() local
676 clkrate = clk_get_rate(ssi_private->baudclk); in fsl_ssi_set_bclk()
678 clkrate = clk_round_rate(ssi_private->baudclk, tmprate); in fsl_ssi_set_bclk()
684 if (clkrate * 5 > clk_get_rate(ssi_private->clk)) in fsl_ssi_set_bclk()
687 clkrate /= factor; in fsl_ssi_set_bclk()
688 afreq = clkrate / (i + 1); in fsl_ssi_set_bclk()
/linux-4.4.14/Documentation/
Dkernel-parameters.txt1354 <bus_id>,<clkrate>