Searched refs:UART01x_FR (Results 1 - 5 of 5) sorted by relevance

/linux-4.4.14/arch/arm/include/debug/
H A Dpl01x.S17 #undef UART01x_FR
19 #define UART01x_FR 0x14 define
34 1001: ldr \rd, [\rx, #UART01x_FR]
41 1001: ldr \rd, [\rx, #UART01x_FR]
/linux-4.4.14/arch/arm/mach-spear/include/mach/
H A Duncompress.h27 while (readl_relaxed(base + UART01x_FR) & UART01x_FR_TXFF) putc()
/linux-4.4.14/drivers/tty/serial/
H A Damba-pl010.c134 status = readb(uap->port.membase + UART01x_FR); pl010_rx_chars()
177 status = readb(uap->port.membase + UART01x_FR); pl010_rx_chars()
222 status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; pl010_modem_status()
278 unsigned int status = readb(uap->port.membase + UART01x_FR); pl010_tx_empty()
289 status = readb(uap->port.membase + UART01x_FR); pl010_get_mctrl()
351 uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; pl010_startup()
588 status = readb(uap->port.membase + UART01x_FR); pl010_console_putchar()
615 status = readb(uap->port.membase + UART01x_FR); pl010_console_write()
H A Damba-pl011.c199 status = readw(uap->port.membase + UART01x_FR); pl011_fifo_to_tty()
663 if (readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) { pl011_dma_tx_start()
1078 while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_BUSY) pl011_dma_shutdown()
1266 readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) pl011_tx_char()
1316 status = readw(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; pl011_modem_status()
1403 unsigned int status = readw(uap->port.membase + UART01x_FR); pl011_tx_empty()
1412 unsigned int status = readw(uap->port.membase + UART01x_FR); pl011_get_mctrl()
1509 status = readw(uap->port.membase + UART01x_FR); pl011_get_poll_char()
1522 while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) pl011_put_poll_char()
1639 uap->old_status = readw(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; pl011_startup()
2055 while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) pl011_console_putchar()
2095 status = readw(uap->port.membase + UART01x_FR); pl011_console_write()
2207 while (readl(port->membase + UART01x_FR) & UART01x_FR_TXFF) pl011_putc()
2210 while (readl(port->membase + UART01x_FR) & UART01x_FR_BUSY) pl011_putc()
/linux-4.4.14/include/linux/amba/
H A Dserial.h42 #define UART01x_FR 0x18 /* Flag register (Read only). */ macro

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