Lines Matching refs:UART01x_FR
199 status = readw(uap->port.membase + UART01x_FR); in pl011_fifo_to_tty()
663 if (readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) { in pl011_dma_tx_start()
1078 while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_BUSY) in pl011_dma_shutdown()
1266 readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) in pl011_tx_char()
1316 status = readw(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; in pl011_modem_status()
1403 unsigned int status = readw(uap->port.membase + UART01x_FR); in pl011_tx_empty()
1412 unsigned int status = readw(uap->port.membase + UART01x_FR); in pl011_get_mctrl()
1509 status = readw(uap->port.membase + UART01x_FR); in pl011_get_poll_char()
1522 while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) in pl011_put_poll_char()
1639 uap->old_status = readw(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; in pl011_startup()
2055 while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) in pl011_console_putchar()
2095 status = readw(uap->port.membase + UART01x_FR); in pl011_console_write()
2207 while (readl(port->membase + UART01x_FR) & UART01x_FR_TXFF) in pl011_putc()
2210 while (readl(port->membase + UART01x_FR) & UART01x_FR_BUSY) in pl011_putc()