Searched refs:U300_PIN_REG (Results 1 - 1 of 1) sorted by relevance

/linux-4.4.14/drivers/pinctrl/
H A Dpinctrl-coh901.c93 #define U300_PIN_REG(pin, reg) \ macro
224 return readl(U300_PIN_REG(offset, dir)) & U300_PIN_BIT(offset); u300_gpio_get()
235 val = readl(U300_PIN_REG(offset, dor)); u300_gpio_set()
237 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, dor)); u300_gpio_set()
239 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, dor)); u300_gpio_set()
251 val = readl(U300_PIN_REG(offset, pcr)); u300_gpio_direction_input()
254 writel(val, U300_PIN_REG(offset, pcr)); u300_gpio_direction_input()
268 val = readl(U300_PIN_REG(offset, pcr)); u300_gpio_direction_output()
281 writel(val, U300_PIN_REG(offset, pcr)); u300_gpio_direction_output()
299 biasmode = !!(readl(U300_PIN_REG(offset, per)) & U300_PIN_BIT(offset)); u300_gpio_config_get()
302 drmode = readl(U300_PIN_REG(offset, pcr)); u300_gpio_config_get()
359 val = readl(U300_PIN_REG(offset, per)); u300_gpio_config_set()
360 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, per)); u300_gpio_config_set()
363 val = readl(U300_PIN_REG(offset, per)); u300_gpio_config_set()
364 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, per)); u300_gpio_config_set()
367 val = readl(U300_PIN_REG(offset, pcr)); u300_gpio_config_set()
372 writel(val, U300_PIN_REG(offset, pcr)); u300_gpio_config_set()
375 val = readl(U300_PIN_REG(offset, pcr)); u300_gpio_config_set()
380 writel(val, U300_PIN_REG(offset, pcr)); u300_gpio_config_set()
383 val = readl(U300_PIN_REG(offset, pcr)); u300_gpio_config_set()
388 writel(val, U300_PIN_REG(offset, pcr)); u300_gpio_config_set()
414 val = readl(U300_PIN_REG(offset, icr)); u300_toggle_trigger()
418 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); u300_toggle_trigger()
423 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); u300_toggle_trigger()
452 val = readl(U300_PIN_REG(offset, icr)); u300_gpio_irq_type()
453 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); u300_gpio_irq_type()
458 val = readl(U300_PIN_REG(offset, icr)); u300_gpio_irq_type()
459 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); u300_gpio_irq_type()
478 val = readl(U300_PIN_REG(offset, ien)); u300_gpio_irq_enable()
479 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, ien)); u300_gpio_irq_enable()
492 val = readl(U300_PIN_REG(offset, ien)); u300_gpio_irq_disable()
493 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, ien)); u300_gpio_irq_disable()
517 val = readl(U300_PIN_REG(pinoffset, iev)); u300_gpio_irq_handler()
521 writel(val, U300_PIN_REG(pinoffset, iev)); u300_gpio_irq_handler()

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