Searched refs:TEGRA_CLK_RESET_BASE (Results 1 - 7 of 7) sorted by relevance

/linux-4.4.14/arch/arm/include/debug/
H A Dtegra.S30 #define TEGRA_CLK_RESET_BASE 0x60006000 define
39 #define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
40 #define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
41 #define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
42 #define TEGRA_CLK_OUT_ENB_L (TEGRA_CLK_RESET_BASE + 0x10)
43 #define TEGRA_CLK_OUT_ENB_H (TEGRA_CLK_RESET_BASE + 0x14)
44 #define TEGRA_CLK_OUT_ENB_U (TEGRA_CLK_RESET_BASE + 0x18)
/linux-4.4.14/arch/arm/mach-tegra/
H A Dsleep-tegra30.S257 mov32 r5, TEGRA_CLK_RESET_BASE
327 mov32 r0, TEGRA_CLK_RESET_BASE
544 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18
545 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c
555 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18
556 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c
571 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18
572 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c
604 * r5 = TEGRA_CLK_RESET_BASE
707 * r5 = TEGRA_CLK_RESET_BASE
H A Diomap.h49 #define TEGRA_CLK_RESET_BASE 0x60006000 macro
H A Dsleep.S153 mov32 r5, TEGRA_CLK_RESET_BASE
H A Dsleep.h27 #define TEGRA_CLK_RESET_VIRT (TEGRA_CLK_RESET_BASE - IO_PPSB_PHYS \
H A Dsleep-tegra20.S345 mov32 r0, TEGRA_CLK_RESET_BASE
538 mov32 r5, TEGRA_CLK_RESET_BASE
H A Dreset-handler.S229 mov32 r7, TEGRA_CLK_RESET_BASE

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