Searched refs:SPSR (Results 1 - 17 of 17) sorted by relevance

/linux-4.4.14/drivers/spi/
H A Dspi-sh-hspi.c35 #define SPSR 0x04 macro
41 /* SPSR */
82 if ((mask & hspi_read(hspi, SPSR)) == val) hspi_status_check_timeout()
147 hspi_write(hspi, SPSR, 0x0); hspi_hw_setup()
H A Dspi-txx9.c62 /* SPSR : SPI Status */
H A Dspi-rspi.c103 /* SPSR - Status Register */
/linux-4.4.14/arch/arm64/include/uapi/asm/
H A Dptrace.h42 /* AArch64 SPSR bits */
/linux-4.4.14/arch/arm/include/asm/
H A Dvirt.h26 * CPU. The zImage loader stashes this value in an SPSR, so we need an
/linux-4.4.14/arch/arm64/kvm/
H A Dregmap.c142 * Return the SPSR for the current mode of the virtual CPU.
/linux-4.4.14/arch/arm64/include/asm/
H A Dkvm_emulate.h120 /* Get vcpu SPSR for current mode */ vcpu_spsr()
/linux-4.4.14/arch/arm/kvm/
H A Dinterrupts.S268 * so will push the necessary state (SPSR, lr_usr) on the Hyp stack.
389 mrs lr, SPSR
H A Dinterrupts_head.S139 * Restore SP, LR and SPSR for a given mode. offset is the offset of
194 * Save SP, LR and SPSR for a given mode. offset is the offset of
H A Demulate.c143 * Return the SPSR for the current mode of the virtual CPU.
/linux-4.4.14/arch/arm64/kernel/
H A Ddebug-monitors.c388 * If single step is active for this thread, then set SPSR.SS user_rewind_single_step()
H A Dentry.S120 ldp x21, x22, [sp, #S_PC] // load ELR, SPSR
/linux-4.4.14/arch/arm/kernel/
H A Dentry-common.S191 tst r8, #PSR_T_BIT @ this is SPSR from save_user_regs
/linux-4.4.14/arch/arm/probes/
H A Ddecode-thumb.c264 * MRS Rd, SPSR 1111 0011 1111 xxxx 10x0 xxxx xxxx xxxx
/linux-4.4.14/arch/arm/mm/
H A Dalignment.c55 #define LDM_S_BIT(i) (i & (1 << 22)) /* write CPSR from SPSR */
/linux-4.4.14/drivers/net/wireless/cw1200/
H A Dwsm.c1288 "CPSR: 0x%.8X, SPSR: 0x%.8X\n", wsm_handle_exception()
/linux-4.4.14/arch/arm/boot/compressed/
H A Dhead.S166 @ SPSR

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