| /linux-4.4.14/Documentation/devicetree/bindings/display/imx/ |
| D | ldb.txt | 1 Device-Tree bindings for LVDS Display Bridge (ldb)
3 LVDS Display Bridge
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
7 nodes describing each of the two LVDS encoder channels of the bridge.
15 interfaces as input for each LVDS channel.
17 The phandle points to the iomuxc-gpr region containing the LVDS
23 "di0_pll" - LDB LVDS channel 0 mux
24 "di1_pll" - LDB LVDS channel 1 mux
25 "di0" - LDB LVDS channel 0 gate
26 "di1" - LDB LVDS channel 1 gate
[all …]
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| /linux-4.4.14/Documentation/devicetree/bindings/display/ |
| D | renesas,du.txt | 16 LVDS encoder (named "lvds.x" with "x" being the LVDS controller numerical
27 - R8A779[0134] use one functional clock per channel and one clock per LVDS
29 "x" being the channel numerical index. The LVDS clocks must be named
30 "lvds.x" with "x" being the LVDS encoder numerical index.
47 R8A7790 (H2) DPAD LVDS 0 LVDS 1
48 R8A7791 (M2-W) DPAD LVDS 0 -
49 R8A7793 (M2-N) DPAD LVDS 0 -
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| /linux-4.4.14/drivers/gpu/drm/bridge/ |
| D | Kconfig | 27 tristate "NXP PTN3460 DP/LVDS bridge"
32 NXP PTN3460 eDP-LVDS bridge chip driver.
35 tristate "Parade eDP/LVDS bridge"
42 Parade eDP-LVDS bridge chip driver.
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| /linux-4.4.14/Documentation/devicetree/bindings/display/bridge/ |
| D | thine,thc63lvdm83d.txt | 1 THine Electronics THC63LVDM83D LVDS serializer
4 The THC63LVDM83D is an LVDS serializer designed to support pixel data
21 - Video port 1 for LVDS output
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| /linux-4.4.14/drivers/gpu/drm/rcar-du/ |
| D | Kconfig | 22 bool "R-Car DU LVDS Encoder Support"
26 Enable support for the R-Car Display Unit embedded LVDS encoders
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| /linux-4.4.14/drivers/gpu/drm/imx/ |
| D | Kconfig | 37 tristate "Support for LVDS displays"
41 Choose this to enable the internal LVDS Display Bridge (LDB)
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| /linux-4.4.14/Documentation/devicetree/bindings/display/panel/ |
| D | hannstar,hsd100pxn1.txt | 1 HannStar Display Corp. HSD100PXN1 10.1" XGA LVDS panel
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| /linux-4.4.14/drivers/gpu/drm/gma500/ |
| D | psb_intel_display.c | 235 u32 lvds = REG_READ(LVDS); in psb_intel_crtc_mode_set()
255 REG_WRITE(LVDS, lvds); in psb_intel_crtc_mode_set()
256 REG_READ(LVDS); in psb_intel_crtc_mode_set()
327 is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN); in psb_intel_crtc_clock_get()
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| D | cdv_intel_display.c | 718 if ((REG_READ(LVDS) & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP) in cdv_intel_crtc_mode_set()
749 u32 lvds = REG_READ(LVDS); in cdv_intel_crtc_mode_set()
768 REG_WRITE(LVDS, lvds); in cdv_intel_crtc_mode_set()
769 REG_READ(LVDS); in cdv_intel_crtc_mode_set()
868 is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN); in cdv_intel_crtc_clock_get()
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| D | Kconfig | 24 platforms with LVDS ports. MIPI is not currently supported.
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| D | oaktrail_lvds.c | 112 lvds_port = (REG_READ(LVDS) & in oaktrail_lvds_mode_set()
122 REG_WRITE(LVDS, lvds_port); in oaktrail_lvds_mode_set()
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| D | psb_intel_lvds.c | 276 lvds_priv->saveLVDS = REG_READ(LVDS); in psb_intel_lvds_save()
329 REG_WRITE(LVDS, lvds_priv->saveLVDS); in psb_intel_lvds_restore()
806 lvds = REG_READ(LVDS); in psb_intel_lvds_init()
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| D | oaktrail_device.c | 248 regs->psb.saveLVDS = PSB_RVDC32(LVDS); in oaktrail_save_display_registers()
372 PSB_WVDC32(regs->psb.saveLVDS, LVDS); /*port 61180h*/ in oaktrail_restore_display_registers()
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| D | cdv_device.c | 291 regs->cdv.saveLVDS = REG_READ(LVDS); in cdv_save_display_registers()
359 REG_WRITE(LVDS, regs->cdv.saveLVDS); in cdv_restore_display_registers()
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| D | gma_display.c | 741 (REG_READ(LVDS) & LVDS_PORT_EN) != 0) { in gma_find_best_pll()
748 if ((REG_READ(LVDS) & LVDS_CLKB_POWER_MASK) == in gma_find_best_pll()
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| D | cdv_intel_lvds.c | 741 lvds = REG_READ(LVDS); in cdv_intel_lvds_init()
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| D | psb_intel_reg.h | 448 #define LVDS 0x61180 macro
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| /linux-4.4.14/drivers/gpu/drm/i915/ |
| D | i915_suspend.c | 44 dev_priv->regfile.saveLVDS = I915_READ(LVDS); in i915_save_display()
79 I915_WRITE(LVDS, dev_priv->regfile.saveLVDS & mask); in i915_restore_display()
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| D | intel_lvds.c | 968 lvds_reg = LVDS; in intel_lvds_init()
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| D | intel_display.c | 1313 if (I915_READ(LVDS) & LVDS_PIPEB_SELECT) in assert_panel_unlocked()
8000 I915_READ(LVDS) & LVDS_BORDER_ENABLE; in i9xx_get_pfit_config()
10597 u32 lvds = IS_I830(dev) ? 0 : I915_READ(LVDS); in i9xx_crtc_clock_get()
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| D | i915_reg.h | 3414 #define LVDS 0x61180 macro
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| /linux-4.4.14/drivers/gpu/drm/amd/amdgpu/ |
| D | smu7.h | 161 LVDS, enumerator
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| /linux-4.4.14/drivers/gpu/drm/radeon/ |
| D | smu7.h | 161 LVDS, enumerator
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| /linux-4.4.14/drivers/video/fbdev/nvidia/ |
| D | nv_setup.c | 660 par->LVDS = 0; in NVCommonSetup()
664 par->LVDS = 1; in NVCommonSetup()
665 printk("nvidiafb: Panel is %s\n", par->LVDS ? "LVDS" : "TMDS"); in NVCommonSetup()
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| D | nv_type.h | 134 int LVDS; member
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| /linux-4.4.14/arch/arm/boot/dts/ |
| D | imx53-tx53-x13x.dts | 17 model = "Ka-Ro electronics TX53 module (LVDS)";
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| D | dove-sbc-a510.dts | 52 * 0.4 LVDS transmitter DS90C365 PD# (active low power down)
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| D | tegra30-apalis.dtsi | 360 /* LVDS Transceiver Configuration */
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| D | rk3288.dtsi | 651 * *_LVDS_* LVDS
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| /linux-4.4.14/Documentation/fb/ |
| D | viafb.txt | 149 12: 12-Bit LVDS or 12-Bit TMDS (default)
150 24: 24-Bit LVDS or 24-Bit TMDS
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| D | modedb.txt | 52 video=LVDS-1:d video=HDMI-1:D
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| /linux-4.4.14/drivers/video/fbdev/intelfb/ |
| D | intelfbhw.h | 268 #define LVDS 0x61180 macro
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| D | intelfbhw.c | 284 if (INREG(LVDS) & PORT_ENABLE) in intelfbhw_check_non_crt()
580 hw->lvds = INREG(LVDS); in intelfbhw_read_hw_state()
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