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Searched refs:HCLK (Results 1 – 41 of 41) sorted by relevance

/linux-4.4.14/Documentation/devicetree/bindings/mtd/
Dfsmc-nand.txt19 byte 2 THIZ : number of HCLK clock cycles during which the data bus is
23 byte 3 THOLD : number of HCLK clock cycles to hold the address (and data
26 byte 4 TWAIT : number of HCLK clock cycles to assert the command to the
29 byte 5 TSET : number of HCLK clock cycles to assert the address before the
/linux-4.4.14/Documentation/devicetree/bindings/clock/
Dst,nomadik.txt34 HCLK nodes: these represent the clock gates on individual
35 lines from the HCLK clock tree and the gate for individual
38 Requires properties for the HCLK nodes:
/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
Ds3c2410.h28 #define HCLK 5 macro
Ds3c2412.h30 #define HCLK 7 macro
Ds3c2443.h27 #define HCLK 5 macro
Dsamsung,s3c64xx-clock.h30 #define HCLK 8 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
Ds3c2410.h28 #define HCLK 5 macro
Ds3c2412.h30 #define HCLK 7 macro
Ds3c2443.h27 #define HCLK 5 macro
Dsamsung,s3c64xx-clock.h30 #define HCLK 8 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
Ds3c2410.h28 #define HCLK 5 macro
Ds3c2412.h30 #define HCLK 7 macro
Ds3c2443.h27 #define HCLK 5 macro
Dsamsung,s3c64xx-clock.h30 #define HCLK 8 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
Ds3c2410.h28 #define HCLK 5 macro
Ds3c2412.h30 #define HCLK 7 macro
Ds3c2443.h27 #define HCLK 5 macro
Dsamsung,s3c64xx-clock.h30 #define HCLK 8 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
Ds3c2410.h28 #define HCLK 5 macro
Ds3c2412.h30 #define HCLK 7 macro
Ds3c2443.h27 #define HCLK 5 macro
Dsamsung,s3c64xx-clock.h30 #define HCLK 8 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
Ds3c2410.h28 #define HCLK 5 macro
Ds3c2412.h30 #define HCLK 7 macro
Ds3c2443.h27 #define HCLK 5 macro
Dsamsung,s3c64xx-clock.h30 #define HCLK 8 macro
/linux-4.4.14/include/dt-bindings/clock/
Ds3c2410.h28 #define HCLK 5 macro
Ds3c2412.h30 #define HCLK 7 macro
Ds3c2443.h27 #define HCLK 5 macro
Dsamsung,s3c64xx-clock.h30 #define HCLK 8 macro
/linux-4.4.14/drivers/clk/samsung/
Dclk-s3c2410.c150 ALIAS(HCLK, NULL, "hclk"),
204 DIV(HCLK, "hclk", "mpll", CLKDIVN, 1, 1),
273 MUX(HCLK, "hclk", hclk_p, CLKDIVN, 1, 2),
Dclk-s3c2412.c110 DIV(HCLK, "hclk", "armdiv", CLKDIVN, 0, 2),
202 ALIAS(HCLK, NULL, "hclk"),
Dclk-s3c2443.c147 DIV_T(HCLK, "hclk", "prediv", CLKDIV0, 0, 2, hclk_d),
192 ALIAS(HCLK, NULL, "hclk"),
Dclk-s3c64xx.c229 DIV(HCLK, "hclk", "hclkx2", CLK_DIV0, 8, 1),
383 ALIAS(HCLK, NULL, "hclk"),
/linux-4.4.14/include/video/
Dkyro.h33 u32 HCLK; /* Hor Clock */ member
/linux-4.4.14/Documentation/devicetree/bindings/mmc/
Dmtk-sd.txt12 - clocks: MSDC source clock, HCLK
Dsdhci-msm.txt17 "iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
/linux-4.4.14/drivers/mmc/host/
Dtoshsd.h15 #define HCLK 33000000 /* 33 MHz (PCI clock) */ macro
Dtoshsd.c89 while (ios->clock < HCLK / div) in __toshsd_set_ios()
645 mmc->f_min = HCLK / 512; in toshsd_probe()
646 mmc->f_max = HCLK; in toshsd_probe()
/linux-4.4.14/arch/arm/boot/dts/
Dste-nomadik-stn8815.dtsi207 /* HCLK divides the PLL1 with 1,2,3 or 4 */
213 /* The PCLK domain uses HCLK right off */
/linux-4.4.14/drivers/video/fbdev/kyro/
Dfbdev.c498 par->HCLK = (1000000000 + (lineclock / 2)) / lineclock; in kyrofb_set_par()