Searched refs:timer_baseaddr (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/arch/microblaze/kernel/
H A Dtimer.c23 static void __iomem *timer_baseaddr; variable
72 write_fn(read_fn(timer_baseaddr + TCSR0) & ~TCSR_ENT, xilinx_timer0_stop()
73 timer_baseaddr + TCSR0); xilinx_timer0_stop()
81 write_fn(load_val, timer_baseaddr + TLR0); xilinx_timer0_start_periodic()
84 write_fn(TCSR_LOAD, timer_baseaddr + TCSR0); xilinx_timer0_start_periodic()
100 timer_baseaddr + TCSR0); xilinx_timer0_start_periodic()
108 write_fn(load_val, timer_baseaddr + TLR0); xilinx_timer0_start_oneshot()
111 write_fn(TCSR_LOAD, timer_baseaddr + TCSR0); xilinx_timer0_start_oneshot()
114 timer_baseaddr + TCSR0); xilinx_timer0_start_oneshot()
160 write_fn(read_fn(timer_baseaddr + TCSR0), timer_baseaddr + TCSR0); timer_ack()
196 return read_fn(timer_baseaddr + TCR1); xilinx_clock_read()
244 write_fn(read_fn(timer_baseaddr + TCSR1) & ~TCSR_ENT, xilinx_clocksource_init()
245 timer_baseaddr + TCSR1); xilinx_clocksource_init()
247 write_fn(TCSR_TINT|TCSR_ENT|TCSR_ARHT, timer_baseaddr + TCSR1); xilinx_clocksource_init()
266 timer_baseaddr = of_iomap(timer, 0); xilinx_timer_init()
267 if (!timer_baseaddr) { xilinx_timer_init()
275 write_fn(TCSR_MDT, timer_baseaddr + TCSR0); xilinx_timer_init()
276 if (!(read_fn(timer_baseaddr + TCSR0) & TCSR_MDT)) { xilinx_timer_init()
/linux-4.1.27/drivers/clocksource/
H A Dcadence_ttc_timer.c468 void __iomem *timer_baseaddr; ttc_timer_init() local
484 timer_baseaddr = of_iomap(timer, 0); ttc_timer_init()
485 if (!timer_baseaddr) { ttc_timer_init()
498 clksel = readl_relaxed(timer_baseaddr + TTC_CLK_CNTRL_OFFSET); ttc_timer_init()
506 clksel = readl_relaxed(timer_baseaddr + 4 + TTC_CLK_CNTRL_OFFSET); ttc_timer_init()
514 ttc_setup_clocksource(clk_cs, timer_baseaddr, timer_width); ttc_timer_init()
515 ttc_setup_clockevent(clk_ce, timer_baseaddr + 4, irq); ttc_timer_init()
517 pr_info("%s #0 at %p, irq=%d\n", timer->name, timer_baseaddr, irq); ttc_timer_init()

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