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Searched refs:rFPGA0_XB_LSSIParameter (Results 1 – 13 of 13) sorted by relevance

/linux-4.1.27/drivers/staging/rtl8188eu/hal/
Dbb_cfg.c627 reg[RF_PATH_B]->rf3wireOffset = rFPGA0_XB_LSSIParameter; in rtl88e_phy_init_bb_rf_register_definition()
Dphy.c1134 phy_set_bb_reg(adapt, rFPGA0_XB_LSSIParameter, bMaskDWord, in phy_iq_calibrate()
1242 phy_set_bb_reg(adapt, rFPGA0_XB_LSSIParameter, in phy_iq_calibrate()
/linux-4.1.27/drivers/staging/rtl8192u/
Dr819xU_phyreg.h57 #define rFPGA0_XB_LSSIParameter 0x844 macro
Dr819xU_phy.c613 priv->PHYRegDef[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; in rtl8192_InitBBRFRegDef()
/linux-4.1.27/drivers/staging/rtl8192e/rtl8192e/
Dr819xE_phyreg.h61 #define rFPGA0_XB_LSSIParameter 0x844 macro
Dr8192E_phyreg.h74 #define rFPGA0_XB_LSSIParameter 0x844 macro
Dr8192E_phy.c426 priv->PHYRegDef[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; in rtl8192_InitBBRFRegDef()
/linux-4.1.27/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h100 #define rFPGA0_XB_LSSIParameter 0x844 macro
/linux-4.1.27/drivers/staging/rtl8723au/hal/
DHalDMOutSrc8723A_CE.c789 rFPGA0_XB_LSSIParameter, 0x00010000); in _PHY_IQCalibrate()
879 rFPGA0_XB_LSSIParameter, 0x00032ed3); in _PHY_IQCalibrate()
Drtl8723a_phycfg.c475 pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; in phy_InitBBRFRegisterDefinition()
/linux-4.1.27/drivers/staging/rtl8188eu/include/
DHal8188EPhyReg.h87 #define rFPGA0_XB_LSSIParameter 0x844 macro
Drtw_mp_phy_regdef.h126 #define rFPGA0_XB_LSSIParameter 0x844 macro
/linux-4.1.27/drivers/staging/rtl8723au/include/
DHal8723APhyReg.h78 #define rFPGA0_XB_LSSIParameter 0x844 macro