| H A D | xgbe-dev.c | 352 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, HDSMS, XGBE_SPH_HDSMS_SIZE); xgbe_config_sph_mode()
370 XGMAC_IOWRITE_BITS(pdata, MAC_RSSAR, RSSIA, index); xgbe_write_rss_reg()
371 XGMAC_IOWRITE_BITS(pdata, MAC_RSSAR, ADDRT, type); xgbe_write_rss_reg()
372 XGMAC_IOWRITE_BITS(pdata, MAC_RSSAR, CT, 0); xgbe_write_rss_reg()
373 XGMAC_IOWRITE_BITS(pdata, MAC_RSSAR, OB, 1); xgbe_write_rss_reg()
462 XGMAC_IOWRITE_BITS(pdata, MAC_RSSCR, RSSE, 1); xgbe_enable_rss()
472 XGMAC_IOWRITE_BITS(pdata, MAC_RSSCR, RSSE, 0); xgbe_disable_rss()
551 XGMAC_IOWRITE_BITS(pdata, MAC_RFCR, RFE, 0); xgbe_disable_rx_flow_control()
558 XGMAC_IOWRITE_BITS(pdata, MAC_RFCR, RFE, 1); xgbe_enable_rx_flow_control()
594 XGMAC_IOWRITE_BITS(pdata, MAC_RFCR, PFCE, xgbe_config_flow_control()
671 XGMAC_IOWRITE_BITS(pdata, MMC_RIER, ALL_INTERRUPTS, 0xffffffff); xgbe_enable_mac_interrupts()
672 XGMAC_IOWRITE_BITS(pdata, MMC_TIER, ALL_INTERRUPTS, 0xffffffff); xgbe_enable_mac_interrupts()
680 XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0x3); xgbe_set_gmii_speed()
690 XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0x2); xgbe_set_gmii_2500_speed()
700 XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0); xgbe_set_xgmii_speed()
714 XGMAC_IOWRITE_BITS(pdata, MAC_PFR, PR, val); xgbe_set_promiscuous_mode()
728 XGMAC_IOWRITE_BITS(pdata, MAC_PFR, PM, val); xgbe_set_all_multicast_mode()
949 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, IPC, 0); xgbe_disable_rx_csum()
956 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, IPC, 1); xgbe_enable_rx_csum()
964 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLRXS, 1); xgbe_enable_rx_vlan_stripping()
967 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, DOVLTC, 1); xgbe_enable_rx_vlan_stripping()
970 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ERSVLM, 0); xgbe_enable_rx_vlan_stripping()
973 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ESVL, 0); xgbe_enable_rx_vlan_stripping()
976 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLS, 0x3); xgbe_enable_rx_vlan_stripping()
983 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLS, 0); xgbe_disable_rx_vlan_stripping()
991 XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VTFE, 1); xgbe_enable_rx_vlan_filtering()
994 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VTHM, 1); xgbe_enable_rx_vlan_filtering()
997 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VTIM, 0); xgbe_enable_rx_vlan_filtering()
1000 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ETV, 1); xgbe_enable_rx_vlan_filtering()
1008 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VL, 1); xgbe_enable_rx_vlan_filtering()
1016 XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VTFE, 0); xgbe_disable_rx_vlan_filtering()
1066 XGMAC_IOWRITE_BITS(pdata, MAC_VLANHTR, VLHT, vlan_hash_table); xgbe_update_vlan_hash_table()
1206 XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSADDREG, 1); xgbe_update_tstamp_addend()
1219 XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSINIT, 1); xgbe_set_tstamp_time()
1290 XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_TSTAMP_SSINC); xgbe_config_tstamp()
1291 XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_TSTAMP_SNSINC); xgbe_config_tstamp()
1314 XGMAC_IOWRITE_BITS(pdata, MTL_OMR, ETSALG, MTL_ETSALG_DWRR); xgbe_config_dcb_tc()
1848 XGMAC_IOWRITE_BITS(pdata, DMA_MR, SWR, 1); xgbe_exit()
1890 XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, EAME, 1); xgbe_config_dma_bus()
1893 XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, UNDEF, 1); xgbe_config_dma_bus()
1894 XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, BLEN_256, 1); xgbe_config_dma_bus()
1927 XGMAC_IOWRITE_BITS(pdata, MTL_OMR, ETSALG, MTL_ETSALG_WRR); xgbe_config_mtl_mode()
1937 XGMAC_IOWRITE_BITS(pdata, MTL_OMR, RAA, MTL_RAA_SP); xgbe_config_mtl_mode()
2147 XGMAC_IOWRITE_BITS(pdata, MAC_PFR, HPF, 1); xgbe_config_mac_address()
2148 XGMAC_IOWRITE_BITS(pdata, MAC_PFR, HUC, 1); xgbe_config_mac_address()
2149 XGMAC_IOWRITE_BITS(pdata, MAC_PFR, HMC, 1); xgbe_config_mac_address()
2159 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, JE, val); xgbe_config_jumbo_enable()
2190 XGMAC_IOWRITE_BITS(pdata, MAC_VLANIR, CSVL, 0); xgbe_config_vlan_support()
2191 XGMAC_IOWRITE_BITS(pdata, MAC_VLANIR, VLTI, 1); xgbe_config_vlan_support()
2414 XGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 1); xgbe_read_mmc_stats()
2540 XGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 0); xgbe_read_mmc_stats()
2546 XGMAC_IOWRITE_BITS(pdata, MMC_CR, ROR, 1); xgbe_config_mmc()
2549 XGMAC_IOWRITE_BITS(pdata, MMC_CR, CR, 1); xgbe_config_mmc()
2613 XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 1); xgbe_enable_tx()
2631 XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 0); xgbe_disable_tx()
2668 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, DCRCC, 1); xgbe_enable_rx()
2669 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, CST, 1); xgbe_enable_rx()
2670 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, ACS, 1); xgbe_enable_rx()
2671 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, RE, 1); xgbe_enable_rx()
2680 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, DCRCC, 0); xgbe_disable_rx()
2681 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, CST, 0); xgbe_disable_rx()
2682 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, ACS, 0); xgbe_disable_rx()
2683 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, RE, 0); xgbe_disable_rx()
2713 XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 1); xgbe_powerup_tx()
2731 XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 0); xgbe_powerdown_tx()
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