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Searched refs:SPRN_MMCR0 (Results 1 – 18 of 18) sorted by relevance

/linux-4.1.27/tools/testing/selftests/powerpc/pmu/ebb/
Dcycles_with_freeze_test.c39 val = mfspr(SPRN_MMCR0); in ebb_callee()
40 trace_log_reg(ebb_state.trace, SPRN_MMCR0, val); in ebb_callee()
82 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_FC); in cycles_with_freeze()
88 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) | MMCR0_FC); in cycles_with_freeze()
90 val = mfspr(SPRN_MMCR0); in cycles_with_freeze()
Dinstruction_count_test.c35 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_FC); in do_count_loop()
41 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) | MMCR0_FC); in do_count_loop()
126 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_FC); in instruction_count()
Debb.c40 val = mfspr(SPRN_MMCR0); in reset_ebb_with_clear_mask()
41 mtspr(SPRN_MMCR0, (val & ~mmcr0_clear_mask) | MMCR0_PMAE); in reset_ebb_with_clear_mask()
62 val = mfspr(SPRN_MMCR0); in ebb_check_mmcr0()
114 val = mfspr(SPRN_MMCR0); in standard_ebb_callee()
115 trace_log_reg(ebb_state.trace, SPRN_MMCR0, val); in standard_ebb_callee()
222 mmcr0 = mfspr(SPRN_MMCR0); in dump_ebb_hw_state()
297 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) | MMCR0_FC); in ebb_freeze_pmcs()
304 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_FC); in ebb_unfreeze_pmcs()
384 val |= mfspr(SPRN_MMCR0); in ebb_child()
Dpmae_handling_test.c44 before = mfspr(SPRN_MMCR0); in syscall_ebb_callee()
49 after = mfspr(SPRN_MMCR0); in syscall_ebb_callee()
Dback_to_back_ebbs_test.c58 val = mfspr(SPRN_MMCR0); in ebb_callee()
59 trace_log_reg(ebb_state.trace, SPRN_MMCR0, val); in ebb_callee()
Dreg.h23 #define SPRN_MMCR0 779 macro
Dno_handler_test.c46 val = mfspr(SPRN_MMCR0); in no_handler_test()
Dfork_cleanup_test.c58 mtspr(SPRN_MMCR0, MMCR0_FC); in fork_cleanup()
/linux-4.1.27/arch/powerpc/oprofile/
Dop_model_power4.c182 mtspr(SPRN_MMCR0, mmcr0); in power4_cpu_setup()
186 mtspr(SPRN_MMCR0, mmcr0); in power4_cpu_setup()
195 mfspr(SPRN_MMCR0)); in power4_cpu_setup()
220 mmcr0 = mfspr(SPRN_MMCR0); in power4_start()
234 mtspr(SPRN_MMCR0, mmcr0); in power4_start()
247 mmcr0 = mfspr(SPRN_MMCR0); in power4_stop()
249 mtspr(SPRN_MMCR0, mmcr0); in power4_stop()
412 mmcr0 = mfspr(SPRN_MMCR0); in power4_handle_interrupt()
433 mtspr(SPRN_MMCR0, mmcr0); in power4_handle_interrupt()
Dop_model_7450.c61 u32 mmcr0 = mfspr(SPRN_MMCR0); in pmc_start_ctrs()
66 mtspr(SPRN_MMCR0, mmcr0); in pmc_start_ctrs()
72 u32 mmcr0 = mfspr(SPRN_MMCR0); in pmc_stop_ctrs()
77 mtspr(SPRN_MMCR0, mmcr0); in pmc_stop_ctrs()
87 mtspr(SPRN_MMCR0, mmcr0_val); in fsl7450_cpu_setup()
/linux-4.1.27/arch/powerpc/kernel/
Dpmc.c34 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMAO)); in dummy_perf()
36 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_PMXE); in dummy_perf()
Dcpu_setup_power.S173 mtspr SPRN_MMCR0,r5
Dsysfs.c467 SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
/linux-4.1.27/arch/powerpc/kvm/
Dbook3s_hv_interrupts.S82 mfspr r7, SPRN_MMCR0 /* save MMCR0 */
83 mtspr SPRN_MMCR0, r3 /* freeze all counters, disable interrupts */
Dbook3s_emulate.c497 case SPRN_MMCR0: in kvmppc_core_emulate_mtspr_pr()
639 case SPRN_MMCR0: in kvmppc_core_emulate_mfspr_pr()
Dbook3s_hv_rmhandlers.S118 mtspr SPRN_MMCR0, r3
685 mtspr SPRN_MMCR0, r3 /* freeze all counters, disable ints */
726 mtspr SPRN_MMCR0, r3
1483 mfspr r4, SPRN_MMCR0 /* save MMCR0 */
1484 mtspr SPRN_MMCR0, r3 /* freeze all counters, disable ints */
2553 mtspr SPRN_MMCR0, r3
/linux-4.1.27/arch/powerpc/perf/
Dcore-book3s.c677 mtspr(SPRN_MMCR0, MMCR0_PMXE | MMCR0_PMCjCE | MMCR0_PMAO); in pmao_restore_workaround()
680 mtspr(SPRN_MMCR0, MMCR0_FC | MMCR0_PMAO); in pmao_restore_workaround()
800 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCRA)); in perf_event_print_debug()
1119 mtspr(SPRN_MMCR0, mmcr0); in write_mmcr0()
1133 "i" (SPRN_MMCR0), in write_mmcr0()
1146 mtspr(SPRN_MMCR0, mmcr0); in write_mmcr0()
1175 val = mmcr0 = mfspr(SPRN_MMCR0); in power_pmu_disable()
1293 mtspr(SPRN_MMCR0, (cpuhw->mmcr[0] & ~(MMCR0_PMC1CE | MMCR0_PMCjCE)) in power_pmu_enable()
/linux-4.1.27/arch/powerpc/include/asm/
Dreg.h682 #define SPRN_MMCR0 795 macro
857 #define SPRN_MMCR0 952 /* Monitor Mode Control Register 0 */ macro