| /linux-4.1.27/drivers/dma/ |
| D | txx9dmac.h | 75 u64 SAR; /* Source Address Register */ member
85 u32 SAR; member
209 u64 SAR; member
215 u32 SAR; member
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| D | txx9dmac.c | 293 channel64_readq(dc, SAR), in txx9dmac_dump_regs()
305 channel32_readl(dc, SAR), in txx9dmac_dump_regs()
319 channel_writeq(dc, SAR, 0); in txx9dmac_reset_chan()
323 channel_writel(dc, SAR, 0); in txx9dmac_reset_chan()
481 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR); in txx9dmac_dump_desc()
486 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR, in txx9dmac_dump_desc()
494 d->CHAR, d->SAR, d->DAR, d->CNTR); in txx9dmac_dump_desc()
499 d->CHAR, d->SAR, d->DAR, d->CNTR, in txx9dmac_dump_desc()
762 desc->hwdesc.SAR = src + offset; in txx9dmac_prep_dma_memcpy()
768 desc->hwdesc32.SAR = src + offset; in txx9dmac_prep_dma_memcpy()
[all …]
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| D | pl330.c | 337 SAR = 0, enumerator
716 dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val); in _emit_MOV()
1296 off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr); in _setup_xfer()
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| /linux-4.1.27/drivers/i2c/busses/ |
| D | i2c-rcar.c | 74 #define SAR (1 << 0) /* slave addr received */ macro
382 if (ssr_filtered & SAR) { in rcar_i2c_slave_irq()
387 rcar_i2c_write(priv, ICSIER, SDE | SSR | SAR); in rcar_i2c_slave_irq()
391 rcar_i2c_write(priv, ICSIER, SDR | SSR | SAR); in rcar_i2c_slave_irq()
394 rcar_i2c_write(priv, ICSSR, ~SAR & 0xff); in rcar_i2c_slave_irq()
400 rcar_i2c_write(priv, ICSIER, SAR | SSR); in rcar_i2c_slave_irq()
582 rcar_i2c_write(priv, ICSIER, SAR | SSR); in rcar_reg_slave()
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| /linux-4.1.27/arch/sh/include/asm/ |
| D | dma-register.h | 17 #define SAR 0x00 /* Source Address Register */ macro
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| /linux-4.1.27/drivers/net/wireless/ath/ath9k/ |
| D | Kconfig | 116 TX99 support enables Specific Absorption Rate (SAR) testing.
117 SAR is the unit of measurement for the amount of radio frequency(RF)
119 limits used are expressed in the terms of SAR, which is a measure
124 governmental SAR regulations.
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| /linux-4.1.27/Documentation/devicetree/bindings/clock/ |
| D | mvebu-core-clock.txt | 4 reading the Sample-At-Reset (SAR) register. The core clock consumer should
58 - reg : shall be the register address of the Sample-At-Reset (SAR) register
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| /linux-4.1.27/Documentation/devicetree/bindings/iio/adc/ |
| D | rockchip-saradc.txt | 1 Rockchip Successive Approximation Register (SAR) A/D Converter bindings
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| /linux-4.1.27/drivers/dma/sh/ |
| D | shdmac.c | 42 #define SAR 0x00 /* Source Address Register */ macro
221 sh_dmae_writel(sh_chan, hw->sar, SAR); in dmae_set_reg()
466 u32 sar_buf = sh_dmae_readl(sh_chan, SAR); in sh_dmae_desc_completed()
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| /linux-4.1.27/drivers/dma/dw/ |
| D | regs.h | 38 DW_REG(SAR); /* Source Address Register */
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| D | core.c | 173 channel_readl(dwc, SAR), in dwc_dump_chan_regs()
202 channel_writel(dwc, SAR, desc->lli.sar); in dwc_do_single_block()
514 return channel_readl(dwc, SAR); in dw_dma_get_src_addr()
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| /linux-4.1.27/arch/sh/drivers/dma/ |
| D | dma-sh.c | 222 __raw_writel(chan->sar, (dma_base_addr(chan->chan) + SAR)); in sh_dmac_xfer_dma()
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| /linux-4.1.27/arch/xtensa/kernel/ |
| D | coprocessor.S | 271 ssl a3 # SAR: 32 - coprocessor_number
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| D | entry.S | 1142 ssr a0 # save in SAR for later.
1406 rsr a3, sar # WB is still in SAR
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| /linux-4.1.27/arch/arm/mach-omap2/ |
| D | sleep44xx.S | 153 ldreq r0, [r8, #L2X0_SAVE_OFFSET0] @ Retrieve L2 state from SAR
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| /linux-4.1.27/Documentation/parisc/ |
| D | registers | 14 CR11 as specified by ABI (SAR)
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| /linux-4.1.27/arch/arm/boot/dts/ |
| D | armada-xp-synology-ds414.dts | 185 * pin being sampled at reset (bit 0 of SAR).
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| /linux-4.1.27/arch/x86/lib/ |
| D | x86-opcode-map.txt | 820 7: SAR
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| /linux-4.1.27/drivers/tty/ |
| D | synclinkmp.c | 357 #define SAR 0x84 macro
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| /linux-4.1.27/ |
| D | CREDITS | 3760 D: Driver for Interphase ATM (i)Chip SAR adapter card family (x575, x525, x531).
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