Searched refs:R5432_CP0_INTERRUPT_WAR (Results 1 - 15 of 15) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/mach-cavium-octeon/
H A Dwar.h15 #define R5432_CP0_INTERRUPT_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-generic/
H A Dwar.h14 #define R5432_CP0_INTERRUPT_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip22/
H A Dwar.h18 #define R5432_CP0_INTERRUPT_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip27/
H A Dwar.h14 #define R5432_CP0_INTERRUPT_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip28/
H A Dwar.h14 #define R5432_CP0_INTERRUPT_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip32/
H A Dwar.h14 #define R5432_CP0_INTERRUPT_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-malta/
H A Dwar.h14 #define R5432_CP0_INTERRUPT_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-pmcs-msp71xx/
H A Dwar.h14 #define R5432_CP0_INTERRUPT_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-rc32434/
H A Dwar.h14 #define R5432_CP0_INTERRUPT_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-rm/
H A Dwar.h18 #define R5432_CP0_INTERRUPT_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-sead3/
H A Dwar.h14 #define R5432_CP0_INTERRUPT_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-tx49xx/
H A Dwar.h14 #define R5432_CP0_INTERRUPT_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-sibyte/
H A Dwar.h14 #define R5432_CP0_INTERRUPT_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/
H A Dwar.h140 #ifndef R5432_CP0_INTERRUPT_WAR
141 #error Check setting of R5432_CP0_INTERRUPT_WAR for your platform
/linux-4.1.27/arch/mips/kernel/
H A Dgenex.S35 #if R5432_CP0_INTERRUPT_WAR

Completed in 75 milliseconds