Searched refs:R10000_LLSC_WAR (Results 1 - 23 of 23) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/mach-cavium-octeon/
H A Dwar.h22 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-generic/
H A Dwar.h21 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip22/
H A Dwar.h25 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip27/
H A Dwar.h21 #define R10000_LLSC_WAR 1 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip28/
H A Dwar.h21 #define R10000_LLSC_WAR 1 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip32/
H A Dwar.h21 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-malta/
H A Dwar.h21 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-pmcs-msp71xx/
H A Dwar.h21 #define R10000_LLSC_WAR 0 macro
H A Dmsp_regops.h19 * are affected by this bug, make sure to define the symbol 'R10000_LLSC_WAR'
55 #ifndef R10000_LLSC_WAR
56 #define R10000_LLSC_WAR 0 macro
59 #if R10000_LLSC_WAR == 1
/linux-4.1.27/arch/mips/include/asm/mach-rc32434/
H A Dwar.h21 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-rm/
H A Dwar.h25 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-sead3/
H A Dwar.h21 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-tx49xx/
H A Dwar.h21 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/mach-sibyte/
H A Dwar.h37 #define R10000_LLSC_WAR 0 macro
/linux-4.1.27/arch/mips/include/asm/
H A Dspinlock.h63 if (R10000_LLSC_WAR) { arch_spin_lock()
148 if (R10000_LLSC_WAR) { arch_spin_trylock()
228 if (R10000_LLSC_WAR) { arch_read_lock()
263 if (R10000_LLSC_WAR) { arch_read_unlock()
289 if (R10000_LLSC_WAR) { arch_write_lock()
335 if (R10000_LLSC_WAR) { arch_read_trylock()
379 if (R10000_LLSC_WAR) { arch_write_trylock()
H A Dcmpxchg.h22 if (kernel_uses_llsc && R10000_LLSC_WAR) { __xchg_u32()
75 if (kernel_uses_llsc && R10000_LLSC_WAR) { __xchg_u64()
147 if (kernel_uses_llsc && R10000_LLSC_WAR) { \
H A Datomic.h47 if (kernel_uses_llsc && R10000_LLSC_WAR) { \
88 if (kernel_uses_llsc && R10000_LLSC_WAR) { \
158 if (kernel_uses_llsc && R10000_LLSC_WAR) { atomic_sub_if_positive()
326 if (kernel_uses_llsc && R10000_LLSC_WAR) { \
367 if (kernel_uses_llsc && R10000_LLSC_WAR) { \
439 if (kernel_uses_llsc && R10000_LLSC_WAR) { atomic64_sub_if_positive()
H A Dfutex.h23 if (cpu_has_llsc && R10000_LLSC_WAR) { \
152 if (cpu_has_llsc && R10000_LLSC_WAR) { futex_atomic_cmpxchg_inatomic()
H A Dlocal.h33 if (kernel_uses_llsc && R10000_LLSC_WAR) { local_add_return()
78 if (kernel_uses_llsc && R10000_LLSC_WAR) { local_sub_return()
H A Dbitops.h74 if (kernel_uses_llsc && R10000_LLSC_WAR) { set_bit()
126 if (kernel_uses_llsc && R10000_LLSC_WAR) { clear_bit()
189 if (kernel_uses_llsc && R10000_LLSC_WAR) { change_bit()
236 if (kernel_uses_llsc && R10000_LLSC_WAR) { test_and_set_bit()
290 if (kernel_uses_llsc && R10000_LLSC_WAR) { test_and_set_bit_lock()
345 if (kernel_uses_llsc && R10000_LLSC_WAR) { test_and_clear_bit()
419 if (kernel_uses_llsc && R10000_LLSC_WAR) { test_and_change_bit()
H A Dwar.h225 #ifndef R10000_LLSC_WAR
226 #error Check setting of R10000_LLSC_WAR for your platform
/linux-4.1.27/arch/mips/kernel/
H A Dsyscall.c111 if (cpu_has_llsc && R10000_LLSC_WAR) { mips_atomic_set()
/linux-4.1.27/arch/mips/mm/
H A Dtlbex.c90 return R10000_LLSC_WAR; r10000_llsc_war()

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