Searched refs:NV04_PFIFO_CACHE1_DMA_PUT (Results 1 - 6 of 6) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dnv04.h109 #define NV04_PFIFO_CACHE1_DMA_PUT 0x00003240 macro
H A Dnv10.c36 { 32, 0, 0x00, 0, NV04_PFIFO_CACHE1_DMA_PUT },
H A Dnv17.c36 { 32, 0, 0x00, 0, NV04_PFIFO_CACHE1_DMA_PUT },
H A Dnv40.c38 { 32, 0, 0x00, 0, NV04_PFIFO_CACHE1_DMA_PUT },
H A Dnv04.c39 { 32, 0, 0x00, 0, NV04_PFIFO_CACHE1_DMA_PUT },
/linux-4.1.27/drivers/gpu/drm/nouveau/
H A Dnouveau_reg.h544 #define NV04_PFIFO_CACHE1_DMA_PUT 0x00003240 macro

Completed in 79 milliseconds