Searched refs:DMA_CH_TCR (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-dev.c187 return XGMAC_DMA_IOREAD_BITS(pdata->channel, DMA_CH_TCR, PBL); xgbe_get_tx_pbl_val()
200 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, PBL, xgbe_config_tx_pbl_val()
239 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, OSP, xgbe_config_osp_mode()
335 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, TSE, 1); xgbe_config_tso_mode()
2604 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 1); xgbe_enable_tx()
2643 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 0); xgbe_disable_tx()
2709 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 1); xgbe_powerup_tx()
2739 XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 0); xgbe_powerdown_tx()
H A Dxgbe-common.h194 #define DMA_CH_TCR 0x04 macro

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