Searched refs:xmac_base (Results 1 - 4 of 4) sorted by relevance
/linux-4.4.14/arch/arm/mach-netx/ |
H A D | xc.c | 55 writel(RPU_HOLD_PC, x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS); xc_stop() 56 writel(TPU_HOLD_PC, x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS); xc_stop() 63 writel(0, x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS); xc_start() 64 writel(0, x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS); xc_start() 71 return (readl(x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS) & RPU_HOLD_PC) xc_running() 72 || (readl(x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS) & TPU_HOLD_PC) xc_running() 208 x->xmac_base = (void * __iomem)io_p2v(NETX_PA_XMAC(xcno)); request_xc()
|
/linux-4.4.14/arch/arm/mach-netx/include/mach/ |
H A D | xc.h | 28 void __iomem *xmac_base; member in struct:xc
|
/linux-4.4.14/drivers/net/ethernet/ |
H A D | netx-eth.c | 97 void __iomem *sram_base, *xpec_base, *xmac_base; member in struct:netx_eth_priv 401 priv->xmac_base = priv->xc->xmac_base; netx_eth_drv_probe()
|
/linux-4.4.14/drivers/net/ethernet/broadcom/bnx2x/ |
H A D | bnx2x_link.c | 1364 u32 xmac_base; bnx2x_update_pfc_xmac() local 1368 xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; bnx2x_update_pfc_xmac() 1394 REG_WR(bp, xmac_base + XMAC_REG_PAUSE_CTRL, pause_val); bnx2x_update_pfc_xmac() 1395 REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL, pfc0_val); bnx2x_update_pfc_xmac() 1396 REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL_HI, pfc1_val); bnx2x_update_pfc_xmac() 1402 REG_WR(bp, xmac_base + XMAC_REG_PAUSE_CTRL, pause_val); bnx2x_update_pfc_xmac() 1403 REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL, pfc0_val); bnx2x_update_pfc_xmac() 1404 REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL_HI, pfc1_val); bnx2x_update_pfc_xmac() 1408 REG_WR(bp, xmac_base + XMAC_REG_CTRL_SA_LO, bnx2x_update_pfc_xmac() 1413 REG_WR(bp, xmac_base + XMAC_REG_CTRL_SA_HI, bnx2x_update_pfc_xmac() 1720 u32 pfc_ctrl, xmac_base = (port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; bnx2x_set_xmac_rxtx() local 1729 pfc_ctrl = REG_RD(bp, xmac_base + XMAC_REG_PFC_CTRL_HI); bnx2x_set_xmac_rxtx() 1730 REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL_HI, bnx2x_set_xmac_rxtx() 1732 REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL_HI, bnx2x_set_xmac_rxtx() 1735 val = REG_RD(bp, xmac_base + XMAC_REG_CTRL); bnx2x_set_xmac_rxtx() 1740 REG_WR(bp, xmac_base + XMAC_REG_CTRL, val); bnx2x_set_xmac_rxtx() 1747 u32 val, xmac_base; bnx2x_xmac_enable() local 1751 xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; bnx2x_xmac_enable() 1768 REG_WR(bp, xmac_base + XMAC_REG_RX_LSS_CTRL, bnx2x_xmac_enable() 1771 REG_WR(bp, xmac_base + XMAC_REG_CLEAR_RX_LSS_STATUS, 0); bnx2x_xmac_enable() 1772 REG_WR(bp, xmac_base + XMAC_REG_CLEAR_RX_LSS_STATUS, bnx2x_xmac_enable() 1777 REG_WR(bp, xmac_base + XMAC_REG_RX_MAX_SIZE, 0x2710); bnx2x_xmac_enable() 1780 REG_WR(bp, xmac_base + XMAC_REG_TX_CTRL, 0xC800); bnx2x_xmac_enable() 1787 REG_WR(bp, xmac_base + XMAC_REG_EEE_TIMERS_HI, 0x1380008); bnx2x_xmac_enable() 1788 REG_WR(bp, xmac_base + XMAC_REG_EEE_CTRL, 0x1); bnx2x_xmac_enable() 1790 REG_WR(bp, xmac_base + XMAC_REG_EEE_CTRL, 0x0); bnx2x_xmac_enable() 1805 REG_WR(bp, xmac_base + XMAC_REG_CTRL, val); bnx2x_xmac_enable() 12999 u32 xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; bnx2x_link_reset() local 13003 REG_WR(bp, xmac_base + XMAC_REG_CTRL, bnx2x_link_reset()
|
Completed in 206 milliseconds