Searched refs:uframe (Results 1 - 19 of 19) sorted by relevance

/linux-4.4.14/drivers/usb/host/
H A Dehci-sched.c277 unsigned uframe, uf, x; compute_tt_budget() local
286 for (uframe = ps->bw_phase << 3; uframe < EHCI_BANDWIDTH_SIZE; compute_tt_budget()
287 uframe += ps->bw_uperiod) { compute_tt_budget()
288 budget_line = &budget_table[uframe]; compute_tt_budget()
323 /* Which uframe does the low/fullspeed transfer start in?
326 * and this returns the transfer start uframe in "B-frame" terms,
327 * which allows both to match, e.g. a ssplit in "H-frame" uframe 0
328 * will cause a transfer in "B-frame" uframe 0. "B-frames" lag
329 * "H-frames" by 1 uframe. See the EHCI spec sec 4.5 and figure 4.7.
336 /* uframe 7 can't have bw so this will indicate failure */ tt_start_uframe()
345 /* carryover low/fullspeed bandwidth that crosses uframe boundries */ carryover_tt_bandwidth()
360 * specified frame/uframe. Note that (as summarized in section 11.19
362 * uframe.
364 * The uframe parameter is when the fullspeed/lowspeed transfer
366 * highspeed ssplit's uframe (which is in "H-frame" terms). For example
370 * This checks if the full/lowspeed bus, at the specified starting uframe,
376 * since proper scheduling limits ssplits to less than 16 per uframe.
383 unsigned uframe tt_available()
389 if ((period == 0) || (uframe >= 7)) /* error */ tt_available()
404 if (max_tt_usecs[uframe] <= tt_usecs[uframe]) tt_available()
408 * the first and each subsequent fully used uframe tt_available()
415 for (i = uframe; i < (uframe + ufs) && i < 8; i++) tt_available()
420 tt_usecs[uframe] += usecs; tt_available()
424 /* fail if the carryover pushed bw past the last uframe's limit */ tt_available()
450 * (different dev or endpoint) until the next uframe. tt_no_collision()
542 * this just links in a qh; caller guarantees uframe masks are set right.
769 unsigned uframe, check_period()
776 if (uframe >= 8) check_period()
782 for (uframe += frame << 3; uframe < EHCI_BANDWIDTH_SIZE; check_period()
783 uframe += uperiod) { check_period()
784 if (ehci->bandwidth[uframe] > usecs) check_period()
795 unsigned uframe, check_intr_schedule()
804 if (qh->ps.c_usecs && uframe >= 6) /* FSTN territory? */ check_intr_schedule()
807 if (!check_period(ehci, frame, uframe, qh->ps.bw_uperiod, qh->ps.usecs)) check_intr_schedule()
816 if (tt_available(ehci, &qh->ps, tt, frame, uframe)) { check_intr_schedule()
819 /* TODO : this may need FSTN for SSPLIT in uframe 5. */ check_intr_schedule()
820 for (i = uframe+2; i < 8 && i <= uframe+4; i++) check_intr_schedule()
839 mask = 0x03 << (uframe + qh->gap_uf); check_intr_schedule()
842 mask |= 1 << uframe; check_intr_schedule()
844 if (!check_period(ehci, frame, uframe + qh->gap_uf + 1, check_intr_schedule()
847 if (!check_period(ehci, frame, uframe + qh->gap_uf, check_intr_schedule()
863 unsigned uframe; qh_schedule() local
876 uframe = 0; qh_schedule()
895 for (uframe = 0; uframe < 8; uframe++) { qh_schedule()
897 frame, uframe, qh, &c_mask, tt); qh_schedule()
903 /* qh->ps.bw_period == 0 means every uframe */ qh_schedule()
914 qh->ps.phase_uf = uframe; qh_schedule()
916 (c_mask << 8) | (1 << uframe) : qh_schedule()
1221 /* figure out per-uframe itd fields that we'll need later itd_sched_init()
1225 struct ehci_iso_packet *uframe = &iso_sched->packet [i]; itd_sched_init() local
1239 uframe->transaction = cpu_to_hc32(ehci, trans); itd_sched_init()
1241 /* might need to cross a buffer page within a uframe */ itd_sched_init()
1242 uframe->bufp = (buf & ~(u64)0x0fff); itd_sched_init()
1244 if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff)))) itd_sched_init()
1245 uframe->cross = 1; itd_sched_init()
1334 unsigned uframe; reserve_release_iso_bandwidth() local
1344 uframe = stream->ps.bw_phase << 3; reserve_release_iso_bandwidth()
1355 for (i = uframe + stream->ps.phase_uf; i < EHCI_BANDWIDTH_SIZE; reserve_release_iso_bandwidth()
1364 for (i = uframe; i < EHCI_BANDWIDTH_SIZE; reserve_release_iso_bandwidth()
1381 for (i = uframe >> 3; i < EHCI_BANDWIDTH_FRAMES; reserve_release_iso_bandwidth()
1391 unsigned uframe itd_slot_ok()
1399 for (uframe &= stream->ps.bw_uperiod - 1; uframe < EHCI_BANDWIDTH_SIZE; itd_slot_ok()
1400 uframe += stream->ps.bw_uperiod) { itd_slot_ok()
1401 if (ehci->bandwidth[uframe] > usecs) itd_slot_ok()
1411 unsigned uframe, sitd_slot_ok()
1419 mask = stream->ps.cs_mask << (uframe & 7); sitd_slot_ok()
1422 if (((stream->ps.cs_mask & 0xff) << (uframe & 7)) >= (1 << 7)) sitd_slot_ok()
1430 uframe &= stream->ps.bw_uperiod - 1; sitd_slot_ok()
1431 frame = uframe >> 3; sitd_slot_ok()
1437 uf = uframe & 7; sitd_slot_ok()
1454 uf = uframe; sitd_slot_ok()
1465 uf = uframe & ~7; sitd_slot_ok()
1467 for (i = (uframe & 7) + 2; i < 8; (++i, tmp <<= 1)) { sitd_slot_ok()
1475 uframe += stream->ps.bw_uperiod; sitd_slot_ok()
1476 } while (uframe < EHCI_BANDWIDTH_SIZE); sitd_slot_ok()
1478 stream->ps.cs_mask <<= uframe & 7; sitd_slot_ok()
1531 /* find a uframe slot with enough bandwidth. iso_stream_schedule()
1580 next = now + ehci->i_thresh; /* uframe cache */ iso_stream_schedule()
1712 u16 uframe itd_patch()
1720 uframe &= 0x07; itd_patch()
1721 itd->index [uframe] = index; itd_patch()
1723 itd->hw_transaction[uframe] = uf->transaction; itd_patch()
1724 itd->hw_transaction[uframe] |= cpu_to_hc32(ehci, pg << 12); itd_patch()
1773 unsigned next_uframe, uframe, frame; itd_link_urb() local
1790 /* fill iTDs uframe by uframe */ itd_link_urb()
1797 /* ASSERT: no itds for this endpoint in this uframe */ itd_link_urb()
1807 uframe = next_uframe & 0x07; itd_link_urb()
1810 itd_patch(ehci, itd, iso_sched, packet, uframe); itd_link_urb()
1850 unsigned uframe; itd_complete() local
1856 /* for each uframe with a packet */ itd_complete()
1857 for (uframe = 0; uframe < 8; uframe++) { itd_complete()
1858 if (likely (itd->index[uframe] == -1)) itd_complete()
1860 urb_index = itd->index[uframe]; itd_complete()
1863 t = hc32_to_cpup(ehci, &itd->hw_transaction [uframe]); itd_complete()
1864 itd->hw_transaction [uframe] = 0; itd_complete()
766 check_period( struct ehci_hcd *ehci, unsigned frame, unsigned uframe, unsigned uperiod, unsigned usecs ) check_period() argument
792 check_intr_schedule( struct ehci_hcd *ehci, unsigned frame, unsigned uframe, struct ehci_qh *qh, unsigned *c_maskp, struct ehci_tt *tt ) check_intr_schedule() argument
1408 sitd_slot_ok( struct ehci_hcd *ehci, struct ehci_iso_stream *stream, unsigned uframe, struct ehci_iso_sched *sched, struct ehci_tt *tt ) sitd_slot_ok() argument
H A Dehci-sysfs.c100 unsigned uframe; store_uframe_periodic_max() local
129 for (uframe = 0; uframe < EHCI_BANDWIDTH_SIZE; ++uframe) store_uframe_periodic_max()
131 ehci->bandwidth[uframe]); store_uframe_periodic_max()
146 "(== %u usec/uframe)\n", store_uframe_periodic_max()
H A Dfotg210-hcd.c63 #define FOTG210_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
576 /* uframe masks */ fill_periodic_buffer()
722 temp = scnprintf(next, size, "uframe %04x\n", fill_registers_buffer()
2774 * - allowing for high bandwidth, how many nsec/uframe are used? qh_make()
2775 * - split transactions need a second CSPLIT uframe; same question qh_make()
3364 /* how many of the uframe's 125 usecs are allocated? */ periodic_usecs()
3366 unsigned frame, unsigned uframe) periodic_usecs()
3378 if (hw->hw_info2 & cpu_to_hc32(fotg210, 1 << uframe)) periodic_usecs()
3382 1 << (8 + uframe))) periodic_usecs()
3399 if (q->itd->hw_transaction[uframe]) periodic_usecs()
3407 fotg210_err(fotg210, "uframe %d sched overrun: %d usecs\n", periodic_usecs()
3408 frame * 8 + uframe, usecs); periodic_usecs()
3435 * (different dev or endpoint) until the next uframe. tt_no_collision()
3508 * this just links in a qh; caller guarantees uframe masks are set right.
3702 unsigned uframe, unsigned period, unsigned usecs) check_period()
3709 if (uframe >= 8) check_period()
3715 /* we "know" 2 and 4 uframe intervals were rejected; so check_period()
3720 for (uframe = 0; uframe < 7; uframe++) { check_period()
3722 uframe); check_period()
3728 /* just check the specified uframe, at that period */ check_period()
3731 claimed = periodic_usecs(fotg210, frame, uframe); check_period()
3742 unsigned uframe, const struct fotg210_qh *qh, __hc32 *c_maskp) check_intr_schedule()
3747 if (qh->c_usecs && uframe >= 6) /* FSTN territory? */ check_intr_schedule()
3750 if (!check_period(fotg210, frame, uframe, qh->period, qh->usecs)) check_intr_schedule()
3765 mask = 0x03 << (uframe + qh->gap_uf); check_intr_schedule()
3768 mask |= 1 << uframe; check_intr_schedule()
3770 if (!check_period(fotg210, frame, uframe + qh->gap_uf + 1, check_intr_schedule()
3773 if (!check_period(fotg210, frame, uframe + qh->gap_uf, check_intr_schedule()
3788 unsigned uframe; qh_schedule() local
3799 uframe = ffs(hc32_to_cpup(fotg210, &hw->hw_info2) & QH_SMASK); qh_schedule()
3800 status = check_intr_schedule(fotg210, frame, --uframe, qh_schedule()
3803 uframe = 0; qh_schedule()
3818 for (uframe = 0; uframe < 8; uframe++) { qh_schedule()
3820 frame, uframe, qh, qh_schedule()
3827 /* qh->period == 0 means every uframe */ qh_schedule()
3840 ? cpu_to_hc32(fotg210, 1 << uframe) qh_schedule()
4066 /* figure out per-uframe itd fields that we'll need later itd_sched_init()
4070 struct fotg210_iso_packet *uframe = &iso_sched->packet[i]; itd_sched_init() local
4084 uframe->transaction = cpu_to_hc32(fotg210, trans); itd_sched_init()
4086 /* might need to cross a buffer page within a uframe */ itd_sched_init()
4087 uframe->bufp = (buf & ~(u64)0x0fff); itd_sched_init()
4089 if (unlikely((uframe->bufp != (buf & ~(u64)0x0fff)))) itd_sched_init()
4090 uframe->cross = 1; itd_sched_init()
4165 static inline int itd_slot_ok(struct fotg210_hcd *fotg210, u32 mod, u32 uframe, itd_slot_ok() argument
4168 uframe %= period; itd_slot_ok()
4171 if (periodic_usecs(fotg210, uframe >> 3, uframe & 0x7) itd_slot_ok()
4176 uframe += period; itd_slot_ok()
4177 } while (uframe < mod); itd_slot_ok()
4262 /* find a uframe slot with enough bandwidth. iso_stream_schedule()
4333 unsigned index, u16 uframe) itd_patch()
4338 uframe &= 0x07; itd_patch()
4339 itd->index[uframe] = index; itd_patch()
4341 itd->hw_transaction[uframe] = uf->transaction; itd_patch()
4342 itd->hw_transaction[uframe] |= cpu_to_hc32(fotg210, pg << 12); itd_patch()
4387 unsigned next_uframe, uframe, frame; itd_link_urb() local
4404 /* fill iTDs uframe by uframe */ itd_link_urb()
4409 /* ASSERT: no itds for this endpoint in this uframe */ itd_link_urb()
4419 uframe = next_uframe & 0x07; itd_link_urb()
4422 itd_patch(fotg210, itd, iso_sched, packet, uframe); itd_link_urb()
4464 unsigned uframe; itd_complete() local
4470 /* for each uframe with a packet */ itd_complete()
4471 for (uframe = 0; uframe < 8; uframe++) { itd_complete()
4472 if (likely(itd->index[uframe] == -1)) itd_complete()
4474 urb_index = itd->index[uframe]; itd_complete()
4477 t = hc32_to_cpup(fotg210, &itd->hw_transaction[uframe]); itd_complete()
4478 itd->hw_transaction[uframe] = 0; itd_complete()
4735 unsigned frame, uframe; store_uframe_periodic_max() local
4767 for (uframe = 0; uframe < 7; ++uframe) store_uframe_periodic_max()
4770 uframe)); store_uframe_periodic_max()
4783 "setting max periodic bandwidth to %u%% (== %u usec/uframe)\n", store_uframe_periodic_max()
4959 * by default set standard 80% (== 100 usec/uframe) max periodic hcd_fotg210_init()
3365 periodic_usecs(struct fotg210_hcd *fotg210, unsigned frame, unsigned uframe) periodic_usecs() argument
3701 check_period(struct fotg210_hcd *fotg210, unsigned frame, unsigned uframe, unsigned period, unsigned usecs) check_period() argument
3741 check_intr_schedule(struct fotg210_hcd *fotg210, unsigned frame, unsigned uframe, const struct fotg210_qh *qh, __hc32 *c_maskp) check_intr_schedule() argument
4331 itd_patch(struct fotg210_hcd *fotg210, struct fotg210_itd *itd, struct fotg210_iso_sched *iso_sched, unsigned index, u16 uframe) itd_patch() argument
H A Doxu210hp-hcd.c1382 * - allowing for high bandwidth, how many nsec/uframe are used? qh_make()
1383 * - split transactions need a second CSPLIT uframe; same question qh_make()
1847 /* how many of the uframe's 125 usecs are allocated? */ periodic_usecs()
1849 unsigned frame, unsigned uframe) periodic_usecs()
1860 if (q->qh->hw_info2 & cpu_to_le32(1 << uframe)) periodic_usecs()
1863 if (q->qh->hw_info2 & cpu_to_le32(1 << (8 + uframe))) periodic_usecs()
1872 oxu_err(oxu, "uframe %d sched overrun: %d usecs\n", periodic_usecs()
1873 frame * 8 + uframe, usecs); periodic_usecs()
1930 * this just links in a qh; caller guarantees uframe masks are set right.
2005 * and this qh is active in the current uframe qh_unlink_periodic()
2065 unsigned frame, unsigned uframe, check_period()
2073 if (uframe >= 8) check_period()
2077 * 80% periodic == 100 usec/uframe available check_period()
2082 /* we "know" 2 and 4 uframe intervals were rejected; so check_period()
2087 for (uframe = 0; uframe < 7; uframe++) { check_period()
2088 claimed = periodic_usecs(oxu, frame, uframe); check_period()
2094 /* just check the specified uframe, at that period */ check_period()
2097 claimed = periodic_usecs(oxu, frame, uframe); check_period()
2107 unsigned frame, unsigned uframe, check_intr_schedule()
2112 if (qh->c_usecs && uframe >= 6) /* FSTN territory? */ check_intr_schedule()
2115 if (!check_period(oxu, frame, uframe, qh->period, qh->usecs)) check_intr_schedule()
2133 unsigned uframe; qh_schedule() local
2143 uframe = ffs(le32_to_cpup(&qh->hw_info2) & QH_SMASK); qh_schedule()
2144 status = check_intr_schedule(oxu, frame, --uframe, qh_schedule()
2147 uframe = 0; qh_schedule()
2160 for (uframe = 0; uframe < 8; uframe++) { qh_schedule()
2162 frame, uframe, qh, qh_schedule()
2169 /* qh->period == 0 means every uframe */ qh_schedule()
2181 ? cpu_to_le32(1 << uframe) qh_schedule()
2278 /* don't scan past the live uframe */ scan_periodic()
1848 periodic_usecs(struct oxu_hcd *oxu, unsigned frame, unsigned uframe) periodic_usecs() argument
2064 check_period(struct oxu_hcd *oxu, unsigned frame, unsigned uframe, unsigned period, unsigned usecs) check_period() argument
2106 check_intr_schedule(struct oxu_hcd *oxu, unsigned frame, unsigned uframe, const struct ehci_qh *qh, __le32 *c_maskp) check_intr_schedule() argument
H A Dehci.h71 u8 phase_uf; /* uframe part of the phase */
178 unsigned uframe_periodic_max; /* max periodic time per uframe */
261 /* us allocated per uframe */
263 /* us budgeted per uframe */
591 * it hits a "restore" FSTN; then it returns to finish other uframe 0/1 work.
H A Dfotg210.h129 /* max periodic time per uframe */
578 * it hits a "restore" FSTN; then it returns to finish other uframe 0/1 work.
H A Doxu210hp.h53 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
H A Dehci-dbg.c669 /* uframe masks */ fill_periodic_buffer()
889 temp = scnprintf (next, size, "uframe %04x\n", fill_registers_buffer()
H A Dehci-hcd.c80 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
478 * by default set standard 80% (== 100 usec/uframe) max periodic ehci_init()
H A Dehci-q.c792 * - allowing for high bandwidth, how many nsec/uframe are used? qh_make()
793 * - split transactions need a second CSPLIT uframe; same question qh_make()
H A Dehci-hub.c336 /* Apparently some devices need a >= 1-uframe delay here */ ehci_bus_suspend()
/linux-4.4.14/drivers/usb/dwc2/
H A Dhcd.c2068 dev_dbg(hsotg->dev, "Frame remaining at start_transfer (uframe 7):\n"); dwc2_hcd_dump_frrem()
2074 dev_dbg(hsotg->dev, "Frame remaining at start_transfer (uframe 0):\n"); dwc2_hcd_dump_frrem()
2080 dev_dbg(hsotg->dev, "Frame remaining at start_transfer (uframe 1-6):\n"); dwc2_hcd_dump_frrem()
2088 dev_dbg(hsotg->dev, "Frame remaining at sample point A (uframe 7):\n"); dwc2_hcd_dump_frrem()
2093 dev_dbg(hsotg->dev, "Frame remaining at sample point A (uframe 0):\n"); dwc2_hcd_dump_frrem()
2098 dev_dbg(hsotg->dev, "Frame remaining at sample point A (uframe 1-6):\n"); dwc2_hcd_dump_frrem()
2105 dev_dbg(hsotg->dev, "Frame remaining at sample point B (uframe 7):\n"); dwc2_hcd_dump_frrem()
2110 dev_dbg(hsotg->dev, "Frame remaining at sample point B (uframe 0):\n"); dwc2_hcd_dump_frrem()
2115 dev_dbg(hsotg->dev, "Frame remaining at sample point B (uframe 1-6):\n"); dwc2_hcd_dump_frrem()
H A Dhcd_ddma.c422 * Consider uframe counter also, to start xfer asap. If half of dwc2_calc_starting_frame()
/linux-4.4.14/drivers/usb/gadget/function/
H A Dstorage_common.c107 .bInterval = 1, /* NAK every 1 uframe */
/linux-4.4.14/tools/usb/
H A Dffs-test.c171 .bInterval = 1, /* NAK every 1 uframe */
/linux-4.4.14/drivers/usb/core/
H A Durb.c394 /* periodic transfers limit size per frame/uframe, usb_submit_urb()
411 /* "high bandwidth" mode, 1-3 packets/uframe? */ usb_submit_urb()
/linux-4.4.14/drivers/usb/isp1760/
H A Disp1760-hcd.c532 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
/linux-4.4.14/drivers/usb/misc/
H A Dusbtest.c2625 * "high bandwidth" modes (up to 3 packets/uframe). usbtest_probe()
/linux-4.4.14/drivers/usb/musb/
H A Dmusb_host.c2163 * NAK timeout interval is 8 (128 uframe or 16ms) for HS and musb_schedule()

Completed in 567 milliseconds