Searched refs:ttbr (Results 1 - 12 of 12) sorted by relevance

/linux-4.4.14/arch/arm/include/asm/
H A Dproc-fns.h122 u64 ttbr; \
124 : "=r" (ttbr)); \
125 ttbr; \
/linux-4.4.14/arch/arm64/include/asm/
H A Dmmu_context.h51 unsigned long ttbr = page_to_phys(empty_zero_page); cpu_set_reserved_ttbr0() local
57 : "r" (ttbr)); cpu_set_reserved_ttbr0()
/linux-4.4.14/drivers/iommu/
H A Dipmmu-vmsa.c298 u64 ttbr; ipmmu_domain_init_context() local
334 ttbr = domain->cfg.arm_lpae_s1_cfg.ttbr[0]; ipmmu_domain_init_context()
335 ipmmu_ctx_write(domain, IMTTLBR0, ttbr); ipmmu_domain_init_context()
336 ipmmu_ctx_write(domain, IMTTUBR0, ttbr >> 32); ipmmu_domain_init_context()
H A Dio-pgtable.h59 u64 ttbr[2]; member in struct:io_pgtable_cfg::__anon5472::__anon5473
H A Darm-smmu-v3.c526 u64 ttbr; member in struct:arm_smmu_s1_cfg::arm_smmu_ctx_desc
954 val = cfg->cd.ttbr & CTXDESC_CD_1_TTB0_MASK << CTXDESC_CD_1_TTB0_SHIFT; arm_smmu_write_ctx_desc()
1469 cfg->cd.ttbr = pgtbl_cfg->arm_lpae_s1_cfg.ttbr[0]; arm_smmu_domain_finalise_s1()
H A Dio-pgtable-arm.c733 cfg->arm_lpae_s1_cfg.ttbr[0] = virt_to_phys(data->pgd); arm_64_lpae_alloc_pgtable_s1()
734 cfg->arm_lpae_s1_cfg.ttbr[1] = 0; arm_64_lpae_alloc_pgtable_s1()
H A Darm-smmu.c751 reg64 = pgtbl_cfg->arm_lpae_s1_cfg.ttbr[0]; arm_smmu_init_context_bank()
756 reg64 = pgtbl_cfg->arm_lpae_s1_cfg.ttbr[1]; arm_smmu_init_context_bank()
/linux-4.4.14/arch/frv/kernel/
H A Dhead-uc-fr451.S157 movgs gr0,ttbr
H A Dhead-mmu-fr451.S336 movgs gr4,ttbr
/linux-4.4.14/arch/frv/mm/
H A Dmmu-context.c119 asm volatile("movgs %0,ttbr" : : "r"(_pgd)); change_mm_context()
/linux-4.4.14/arch/frv/include/asm/
H A Dspr-regs.h358 #define __get_TTBR() ({ unsigned long x; asm volatile("movsg ttbr,%0" : "=r"(x)); x; })
/linux-4.4.14/arch/arm64/mm/
H A Dfault.c438 { do_bad, SIGBUS, 0, "ttbr address size fault" },

Completed in 399 milliseconds