| /linux-4.4.14/arch/tile/include/asm/ |
| D | irqflags.h | 221 #define IRQ_DISABLE(tmp0, tmp1) \ argument
222 moveli tmp0, hw2_last(LINUX_MASKABLE_INTERRUPTS); \
223 shl16insli tmp0, tmp0, hw1(LINUX_MASKABLE_INTERRUPTS); \
224 shl16insli tmp0, tmp0, hw0(LINUX_MASKABLE_INTERRUPTS); \
225 mtspr SPR_INTERRUPT_MASK_SET_K, tmp0
233 #define IRQ_ENABLE_LOAD(tmp0, tmp1) \ argument
234 GET_INTERRUPTS_ENABLED_MASK_PTR(tmp0); \
235 ld tmp0, tmp0
236 #define IRQ_ENABLE_APPLY(tmp0, tmp1) \ argument
237 mtspr SPR_INTERRUPT_MASK_RESET_K, tmp0
[all …]
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| /linux-4.4.14/arch/tile/lib/ |
| D | memcpy_64.c | 99 op_t tmp0 = 0, tmp1 = 0, tmp2, tmp3; in memcpy() local
123 tmp0 = LD8(src8++); in memcpy()
132 tmp0 = LD8(src8++); in memcpy()
140 tmp0 = __insn_dblalign(tmp0, tmp1, srci); in memcpy()
141 ST8(dst8++, tmp0); in memcpy()
147 tmp0 = LD8(src8++); in memcpy()
152 tmp3 = __insn_dblalign(tmp3, tmp0, srci); in memcpy()
158 tmp0 = __insn_dblalign(tmp0, tmp1, srci); in memcpy()
159 ST8(dst8++, tmp0); in memcpy()
169 for (tmp0 = LD8(src8++); n >= CHIP_L2_LINE_SIZE(); in memcpy()
[all …]
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| /linux-4.4.14/arch/x86/crypto/ |
| D | sha512-ssse3-asm.S | 71 tmp0 = %rax define
122 mov e_64, tmp0 # tmp = e
124 ror $23, tmp0 # 41 # tmp = e ror 23
126 xor e_64, tmp0 # tmp = (e ror 23) ^ e
130 ror $4, tmp0 # 18 # tmp = ((e ror 23) ^ e) ror 4
131 xor e_64, tmp0 # tmp = (((e ror 23) ^ e) ror 4) ^ e
134 ror $14, tmp0 # 14 # tmp = ((((e ror23)^e)ror4)^e)ror14 = S1(e)
135 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)
136 mov a_64, tmp0 # tmp = a
138 and c_64, tmp0 # tmp = a & c
[all …]
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| D | sha512-avx-asm.S | 72 tmp0 = %rax define
129 mov e_64, tmp0 # tmp = e
131 RORQ tmp0, 23 # 41 # tmp = e ror 23
133 xor e_64, tmp0 # tmp = (e ror 23) ^ e
137 RORQ tmp0, 4 # 18 # tmp = ((e ror 23) ^ e) ror 4
138 xor e_64, tmp0 # tmp = (((e ror 23) ^ e) ror 4) ^ e
141 RORQ tmp0, 14 # 14 # tmp = ((((e ror23)^e)ror4)^e)ror14 = S1(e)
142 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)
143 mov a_64, tmp0 # tmp = a
145 and c_64, tmp0 # tmp = a & c
[all …]
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| D | glue_helper-asm-avx2.S | 111 #define gf128mul_x2_ble(iv, mask1, mask2, tmp0, tmp1) \ argument
112 vpsrad $31, iv, tmp0; \
115 vpshufd $0x13, tmp0, tmp0; \
117 vpand mask2, tmp0, tmp0; \
119 vpxor tmp0, iv, iv; \
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| D | camellia-aesni-avx2-asm_64.S | 28 #define filter_8bit(x, lo_t, hi_t, mask4bit, tmp0) \ argument
29 vpand x, mask4bit, tmp0; \
33 vpshufb tmp0, lo_t, tmp0; \
35 vpxor tmp0, x, x;
1197 #define gf128mul_x2_ble(iv, mask1, mask2, tmp0, tmp1) \ argument
1198 vpsrad $31, iv, tmp0; \
1201 vpshufd $0x13, tmp0, tmp0; \
1203 vpand mask2, tmp0, tmp0; \
1205 vpxor tmp0, iv, iv; \
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| D | camellia-aesni-avx-asm_64.S | 32 #define filter_8bit(x, lo_t, hi_t, mask4bit, tmp0) \ argument
33 vpand x, mask4bit, tmp0; \
37 vpshufb tmp0, lo_t, tmp0; \
39 vpxor tmp0, x, x;
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| /linux-4.4.14/arch/m32r/include/asm/ |
| D | spinlock.h | 75 unsigned long tmp0, tmp1; in arch_spin_lock() local
106 : "=&r" (tmp0), "=&r" (tmp1) in arch_spin_lock()
154 unsigned long tmp0, tmp1; in arch_read_lock() local
194 : "=&r" (tmp0), "=&r" (tmp1) in arch_read_lock()
205 unsigned long tmp0, tmp1, tmp2; in arch_write_lock() local
247 : "=&r" (tmp0), "=&r" (tmp1), "=&r" (tmp2) in arch_write_lock()
258 unsigned long tmp0, tmp1; in arch_read_unlock() local
269 : "=&r" (tmp0), "=&r" (tmp1) in arch_read_unlock()
280 unsigned long tmp0, tmp1, tmp2; in arch_write_unlock() local
293 : "=&r" (tmp0), "=&r" (tmp1), "=&r" (tmp2) in arch_write_unlock()
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| /linux-4.4.14/drivers/video/fbdev/aty/ |
| D | radeon_monitor.c | 168 unsigned long tmp, tmp0; in radeon_get_panel_info_BIOS() local
211 tmp0 = BIOS_IN16(tmp+64+i*2); in radeon_get_panel_info_BIOS()
212 if (tmp0 == 0) in radeon_get_panel_info_BIOS()
214 pr_debug(" %d x %d\n", BIOS_IN16(tmp0), BIOS_IN16(tmp0+2)); in radeon_get_panel_info_BIOS()
215 if ((BIOS_IN16(tmp0) == rinfo->panel_info.xres) && in radeon_get_panel_info_BIOS()
216 (BIOS_IN16(tmp0+2) == rinfo->panel_info.yres)) { in radeon_get_panel_info_BIOS()
217 rinfo->panel_info.hblank = (BIOS_IN16(tmp0+17) - BIOS_IN16(tmp0+19)) * 8; in radeon_get_panel_info_BIOS()
218 rinfo->panel_info.hOver_plus = ((BIOS_IN16(tmp0+21) - in radeon_get_panel_info_BIOS()
219 BIOS_IN16(tmp0+19) -1) * 8) & 0x7fff; in radeon_get_panel_info_BIOS()
220 rinfo->panel_info.hSync_width = BIOS_IN8(tmp0+23) * 8; in radeon_get_panel_info_BIOS()
[all …]
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/ |
| D | arith.fuc | 55 push $r3 // tmp0
68 mulu $r3 $r1 $r13 // tmp0 = A_hi * B_lo
70 and $r3 0xffff // tmp0 = tmp0_lo
77 mulu $r3 $r14 $r2 // tmp0 = A_lo * B_hi
79 and $r3 0xffff // tmp0 = tmp0_lo
86 mulu $r3 $r1 $r2 // tmp0 = A_hi * B_hi
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| /linux-4.4.14/arch/arm/crypto/ |
| D | sha1-armv7-neon.S | 72 #define tmp0 q8 macro
161 vadd.u32 tmp0, W0, curK; \
167 vst1.32 {tmp0, tmp1}, [RWK]!; \
184 vadd.u32 tmp0, W0, curK; \
202 vst1.32 {tmp0, tmp1}, [RWK]!; \
214 veor tmp0, tmp0; \
219 vext.8 tmp0, W_m04, tmp0, #4; \
222 veor tmp0, tmp0, W_m16; \
227 veor W, W, tmp0; \
230 vshl.u32 tmp0, W, #1; \
[all …]
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| /linux-4.4.14/drivers/ide/ |
| D | aec62xx.c | 91 u8 tmp0 = 0, tmp1 = 0, tmp2 = 0; in aec6210_set_mode() local
98 tmp0 = pci_bus_clock_list(speed, bus_clock); in aec6210_set_mode()
99 d_conf = ((tmp0 & 0xf0) << 4) | (tmp0 & 0xf); in aec6210_set_mode()
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| /linux-4.4.14/drivers/media/dvb-frontends/ |
| D | cxd2820r_core.c | 192 u8 tmp0, tmp1; in cxd2820r_gpio() local
201 tmp0 = 0x00; in cxd2820r_gpio()
206 tmp0 |= (2 << 6) >> (2 * i); in cxd2820r_gpio()
208 tmp0 |= (1 << 6) >> (2 * i); in cxd2820r_gpio()
223 i, tmp0, tmp1); in cxd2820r_gpio()
226 dev_dbg(&priv->i2c->dev, "%s: wr gpio=%02x %02x\n", __func__, tmp0, in cxd2820r_gpio()
230 ret = cxd2820r_wr_reg_mask(priv, 0x00089, tmp0, 0xfc); in cxd2820r_gpio()
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| D | m88rs2000.c | 487 u8 tmp0, tmp1; in m88rs2000_read_ber() local
490 tmp0 = m88rs2000_readreg(state, 0xd8); in m88rs2000_read_ber()
491 if ((tmp0 & 0x10) != 0) { in m88rs2000_read_ber()
503 m88rs2000_writereg(state, 0xd8, (tmp0 & ~8) | 0x30); in m88rs2000_read_ber()
504 m88rs2000_writereg(state, 0xd8, (tmp0 & ~8) | 0x30); in m88rs2000_read_ber()
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| /linux-4.4.14/arch/arm64/crypto/ |
| D | aes-neon.S | 165 .macro mul_by_x_2x, out0, out1, in0, in1, tmp0, tmp1, const
166 sshr \tmp0\().16b, \in0\().16b, #7
169 and \tmp0\().16b, \tmp0\().16b, \const\().16b
172 eor \out0\().16b, \out0\().16b, \tmp0\().16b
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