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Searched refs:tiling_mode (Results 1 – 14 of 14) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/i915/
Di915_gem_tiling.c63 i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) in i915_tiling_ok() argument
68 if (tiling_mode == I915_TILING_NONE) in i915_tiling_ok()
72 (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev))) in i915_tiling_ok()
118 i915_gem_object_fence_ok(struct drm_i915_gem_object *obj, int tiling_mode) in i915_gem_object_fence_ok() argument
122 if (tiling_mode == I915_TILING_NONE) in i915_gem_object_fence_ok()
136 size = i915_gem_get_gtt_size(obj->base.dev, obj->base.size, tiling_mode); in i915_gem_object_fence_ok()
174 args->stride, obj->base.size, args->tiling_mode)) { in i915_gem_set_tiling()
185 if (args->tiling_mode == I915_TILING_NONE) { in i915_gem_set_tiling()
189 if (args->tiling_mode == I915_TILING_X) in i915_gem_set_tiling()
208 args->tiling_mode = I915_TILING_NONE; in i915_gem_set_tiling()
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Di915_gem_fence.c92 if (obj->tiling_mode != I915_TILING_NONE) { in i965_write_fence_reg()
94 (obj->tiling_mode == I915_TILING_Y ? 32 : 8); in i965_write_fence_reg()
102 if (obj->tiling_mode == I915_TILING_Y) in i965_write_fence_reg()
134 if (obj->tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)) in i915_write_fence_reg()
144 if (obj->tiling_mode == I915_TILING_Y) in i915_write_fence_reg()
176 if (obj->tiling_mode == I915_TILING_Y) in i830_write_fence_reg()
204 WARN(obj && (!obj->stride || !obj->tiling_mode), in i915_gem_write_fence()
206 obj->stride, obj->tiling_mode); in i915_gem_write_fence()
251 if (obj->tiling_mode) in i915_gem_object_fence_lost()
371 bool enable = obj->tiling_mode != I915_TILING_NONE; in i915_gem_object_get_fence()
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Dintel_sprite.c414 if (obj->tiling_mode != I915_TILING_NONE) in vlv_update_plane()
426 obj->tiling_mode, in vlv_update_plane()
454 if (obj->tiling_mode != I915_TILING_NONE) in vlv_update_plane()
533 if (obj->tiling_mode != I915_TILING_NONE) in ivb_update_plane()
560 &x, &y, obj->tiling_mode, in ivb_update_plane()
594 else if (obj->tiling_mode != I915_TILING_NONE) in ivb_update_plane()
675 if (obj->tiling_mode != I915_TILING_NONE) in ilk_update_plane()
698 &x, &y, obj->tiling_mode, in ilk_update_plane()
724 if (obj->tiling_mode != I915_TILING_NONE) in ilk_update_plane()
Di915_gem.c1086 if (obj->tiling_mode == I915_TILING_NONE && in i915_gem_pwrite_ioctl()
1829 obj->tiling_mode == I915_TILING_NONE) { in i915_gem_fault()
1983 i915_gem_get_gtt_size(struct drm_device *dev, uint32_t size, int tiling_mode) in i915_gem_get_gtt_size() argument
1988 tiling_mode == I915_TILING_NONE) in i915_gem_get_gtt_size()
2012 int tiling_mode, bool fenced) in i915_gem_get_gtt_alignment() argument
2019 tiling_mode == I915_TILING_NONE) in i915_gem_get_gtt_alignment()
2026 return i915_gem_get_gtt_size(dev, size, tiling_mode); in i915_gem_get_gtt_alignment()
2338 if (obj->tiling_mode != I915_TILING_NONE && in i915_gem_object_get_pages_gtt()
3444 obj->tiling_mode); in i915_gem_object_bind_to_vm()
3447 obj->tiling_mode, in i915_gem_object_bind_to_vm()
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Di915_drv.h2083 unsigned int tiling_mode:2; member
3023 i915_gem_get_gtt_size(struct drm_device *dev, uint32_t size, int tiling_mode);
3026 int tiling_mode, bool fenced);
3235 obj->tiling_mode != I915_TILING_NONE; in i915_gem_object_needs_bit17_swizzle()
Dintel_display.c2455 unsigned int tiling_mode, in intel_gen4_compute_page_offset() argument
2459 if (tiling_mode != I915_TILING_NONE) { in intel_gen4_compute_page_offset()
2558 obj->tiling_mode = plane_config->tiling; in intel_alloc_initial_plane_obj()
2559 if (obj->tiling_mode == I915_TILING_X) in intel_alloc_initial_plane_obj()
2675 if (obj->tiling_mode != I915_TILING_NONE) in intel_find_initial_plane_obj()
2767 obj->tiling_mode != I915_TILING_NONE) in i9xx_update_primary_plane()
2778 &x, &y, obj->tiling_mode, in i9xx_update_primary_plane()
2874 if (obj->tiling_mode != I915_TILING_NONE) in ironlake_update_primary_plane()
2883 &x, &y, obj->tiling_mode, in ironlake_update_primary_plane()
11009 obj->tiling_mode); in intel_gen4_queue_flip()
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Dintel_fbc.c919 if (obj->tiling_mode != I915_TILING_X || in __intel_fbc_update()
Dintel_drv.h1140 unsigned int tiling_mode,
Dintel_overlay.c1137 if (new_bo->tiling_mode) { in intel_overlay_put_image()
Di915_gpu_error.c709 err->tiling = obj->tiling_mode; in capture_bo()
Di915_gem_execbuffer.c721 obj->tiling_mode != I915_TILING_NONE; in i915_gem_execbuffer_reserve()
Di915_debugfs.c102 switch (obj->tiling_mode) { in get_tiling_flag()
Dintel_pm.c1559 if (obj->tiling_mode == I915_TILING_NONE) in i9xx_update_wm()
/linux-4.4.14/include/uapi/drm/
Di915_drm.h889 __u32 tiling_mode; member
912 __u32 tiling_mode; member